
    NEOMAGIC CORPORATION, Plaintiff-Appellant, v. TRIDENT MICROSYSTEMS, INC., Defendant-Appellee.
    No. 01-1631.
    United States Court of Appeals, Federal Circuit.
    April 17, 2002.
    
      Brian E. Ferguson, McDermott, Will & Emery, of Washington, DC, argued for plaintiff-appellant. With him on the brief were Raphael V. Lupo, Steven A. Maddox, and Stephen K. Shahida.
    Ian N. Feinberg, Gray Cary Ware & Freidenrich LLP, of Palo Alto, California, argued for defendant-appellee. With him on the brief were M. Elizabeth Day, and James Pooley, Milbank, Tweed, Hadley & McCloy LLP, of Palo Alto, CA. Of counsel was Mary A. Lehman, Gray Cary Ware & Freidenrich LLP, of San Diego, CA.
    Before LOURIE, Circuit Judge, FRIEDMAN, Senior Circuit Judge, and CLEVENGER, Circuit Judge.
   CLEVENGER, Circuit Judge.

In this patent infringement suit, Neo-Magic Corp. appeals from a decision of the District Court for the District of Delaware granting summary judgment of nonin-fringement to Trident Microsystems, Inc. (“Trident”). NeoMagic Corp. v. Trident Microsystems, Inc., 129 F.Supp.2d 689, 698 (D.Del.2001). We affirm-in part, vacate-in-part, and remand.

I

The integrated circuit technology in this case involves a graphics controller, also called a graphics engine, which controls the display of graphics on computer monitors. The graphics controller takes data from the computer’s central processing unit (“CPU”) and transforms it into information to be displayed on the monitor. The controller functions together with the dynamic random access memory (“DRAM”). The graphics controller shunts data to the DRAM, which stores it until it is needed for display purposes, and the controller then retrieves the data as needed and displays it on the monitor.

Prior art devices placed the graphics controller and the DRAM on separate chips that were joined together through conductive signal lines that formed data paths between the chips. A block diagram of the dual-chip prior art graphics controller is shown below.

The greater the number of data paths, the higher the speed of the transfer between the chips — one data path allows one bit of information to travel at a time. Though acceptable for desktop computers, where size is unimportant (relative to notebook computers) and power is unproblematic (because desktop computers plug into a wall outlet), the dual-chip design proved troublesome for notebook computers. Notebook computers must be light in weight and small in size to allow portability, and lean in power draw to increase battery life. The greater the number of chips and data paths, the greater the power draw of the overall system. And a dual-chip design takes up more space on the motherboard than would a single chip. Thus, because of power and size constraints, a dual-chip graphics controller in notebook computers could not achieve a level of performance that rivaled desktop computers.

In 1993, Deepraj Puar and Ravi Ranga-nathan, the inventors in this case, set about creating a graphics controller for notebook computers that would perform on a par with or better than desktop computers. Their goal was to turn a two-chip system into a one-chip system by putting the graphics engine and the DRAM on the same chip. A block diagram of their one-chip system is shown below.

The one-chip goal was not new, but until Puar and Ranganathan’s contributions, no one had succeeded in achieving it. The problem is that the DRAM and the graphics engine are electrically incompatible in that, according to the conventional wisdom of the time, the DRAM creates unacceptable interference (noise) with the logic portions of the graphics controller if the two are on the same chip. Puar and Rangana-than developed a way to put the two components on the same chip while isolating the graphics controller components from the noise created by the DRAM. The result was a graphics controller with high speed — a 128 bit interface — and 7.3 megabits of DRAM that was lighter and faster than the prior art versions.

The inventors decided to build their one-chip system by using a conventional DRAM process, a process that utilizes a so-called on-chip generator to bias the substrate — in this case a p-type semiconductor — at a voltage VBB. The on-chip generator creates electrical noise in the substrate that interferes with the logic circuits in the graphics controller. Noise from the DRAM can cause a phenomenon known as latchup, which disables the transistors in the graphics controller’s logic gates and keeps these gates from performing their respective functions. The noise also interferes with the analog circuits in the graphics controllers.

The inventors’ solution to the noise problem was twofold. First, they designed a new circuit for the logic gates. The new circuit decouples the voltage source for the logic gates from the voltage source for the substrate, thereby preventing latchup from disabling the transistors. In essence, because the voltage source for the logic gate transistors is separate from that for the substrate, the noise no longer affects the logic gates.

As for the analog circuits, the inventors’ solution to the noise problem was to place them in an n-well, an n-type region created on a p-type semiconductor. The interface between the p-type semiconductor substrate and the n-type semiconductor in the n-well, called a p-n junction, can be reverse-biased so that components in the n-well are electrically isolated from the p-type substrate, and vice-versa. Because an understanding of reverse-biasing is crucial to our analysis of the district court’s claim construction, we briefly explain the way in which this process results in isolation of the components in the p-region from those in the n-region.

At a p-n junction, the negative and positive charge carriers flow towards the interface between the p- and n-regions.' Some negative charge carriers (free electrons) will then combine with positive charge carriers (holes) at the edge of the p-type region. As illustrated in the figure below, the combination of free electrons with holes at the interface creates a space-charge region, which is called a “depletion-region” due to the relative scarcity of free charge carriers.

Schematic diagram of a p-n junction under thermal equilibrium.

The depletion region consists of a negatively-charged section at the edge of the p-region where the free electrons have congregated and combined with holes, and a positively-charged section at the edge of the n-region, which has been depleted of free electrons. Though there is no net charge on the substrate, the charge separation across the depletion region creates an electric field across the junction run-

ning from positive to negative, and gives rise to a potential barrier between the p-side and the n-side of the p-n junction.

A p-n junction will pass an electric current in only one direction. Current will flow if the voltage applied to the p-region is more positive than that applied to the n-region; applying current in this way is called forward-biasing. Conversely, reverse-biasing occurs when the voltage in the p-region is negative with respect to that in the n-region, ie., the exact opposite of the conditions required for forward-biasing. Reverse-biasing does not require the application of an absolute negative voltage to the p-region. All that is necessary is that the voltage applied to the p-region be less positive than that applied to the n-region. Reverse-biasing expands the depletion region, which raises the potential barrier between the p- and n-regions and blocks the flow of current across the junction.

The inventors isolated the analog components of the graphics controller in an n-well, and they reverse-biased the p-n junction between the n-well and the p-type substrate. Reverse-biasing prevents noise in the p-type substrate from interfering with the components in the n-well, which allows the DRAM and analog portions of the graphics controller to coexist on the same chip. A figure depicting this aspect of the invention is shown below.

The figure depicts a p-type substrate powered at a voltage VBB. The substrate has an n-well powered at a voltage VDD, which contains the analog circuits of the graphics controller. The p-n junction formed at the interface of the p-substrate and the n-well will be reverse-biased only if VBB is negative with respect to VDD, meaning that VBB must be less positive than VDD. If the p-n junction is reverse-biased, then any noise that may exist in the p-substrate will not interfere with the analog components in the n-well.

The inventors’ application for a patent on their single-chip graphics controller suffered a somewhat tortuous prosecution. After the examiner imposed a restriction requirement, the inventors abandoned their original application and filed several continuation applications on the separate inventions identified by the examiner. These applications eventually issued to NeoMagic, the inventors’ assignee, as U.S. Patent Nos. 5,650,955 (the “ '955 patent”), 5,703,806 (the “ '806 patent”), and 6,041,-010 (the “ '010 patent”). Only the '955 and '806 patents are at issue here. The '955 patent is directed towards the redesigned logic gate that decouples the voltage source from that of the substrate, and the '806 patent is directed towards the reverse-biased n-well invention.

Claims 1 and 2 of the '955 patent recite:

1. An integrated circuit in a semiconductor substrate comprising
a memory portion having a capacity of at least 2 megabits; and
at least 30K logic gates with underlying substrate regions, said logic gates interconnected with said memory portion, said logic gates with a voltage supply having a coupling to said underlying substrate regions determined by a voltage of said underlying substrate regions.
2. The integrated circuit of claim 1 comprising at least 40K logic gates; and said memory portion has a capacity of at least 7.3 megabits.

'955 Patent, col. 10, lines 38-51 (emphasis added). Independent claims 7 and 18 of the '806 patent are representative of the claims at issue in this case. They recite:

7. In an integrated circuit having a logic portion having at least 30K logic gates and a memory portion coupled to said logic portion, said memory portion having a capacity of at least 2 megabits, a capacitor comprising
a first dopant-type transistor in an a[sic] second dopant-type well in a first do-pant-type semiconductor substrate, said first dopant-type transistor having a gate, first and second source/drains, said first source/drain connected in common to said second source/drain to form a first terminal of said capacitor, said gate forming a second terminal of said capacitor, said a[sic] second dopant-type well connected to a first power supply, and said substrate connected to a second power supply at a negative voltage with respect to said first power supply;
whereby said capacitor is isolated from electrical noise in said substrate.
18. An integrated circuit comprising
a logic portion having at least 30K logic gates;
a memory portion coupled to said logic portion, said memory portion having a capacity of at least 2 megabits, and
an analog circuit having a capacitor, said capacitor comprising a first dopant-type transistor in a second dopant-type well in a first dopant-type semiconductor substrate, said first dopant-type transistor having a gate, first and second source/drains, said first source/drain connected in common to said second source/drain to form a first terminal of said capacitor, said gate forming a second terminal of said capacitor, said second dopant-type well connected to a first power supply, and said substrate connected to a second power supply at a negative voltage with respect to said first power supply;
whereby said capacitor is isolated from electrical noise in said substrate.

'806 Patent, col. 10, line 64 to col. 12, line 13 (emphases added). The emphases denote the claim terms at issue in this appeal.

On December 14, 1998, NeoMagic filed suit against Trident, a direct competitor, in the District of Delaware, alleging infringement of the '955 and '806 patents. NeoMagic accused Trident’s Cyber 9388, 9520, 9525, 9540, and PV8 embedded memory graphic accelerators of infringing claims 1 and 2 of the '955 patent and claims 7, 9,13, 18, 20, 24, and 26 of the '806 patent. Trident’s devices are generally similar to the claimed inventions, except that Trident uses an alternative DRAM method that applies a ground voltage (zero volts) to the substrate instead of the voltage VBb supplied by the on-chip generator, and Trident places its memory components in triple wells. Trident denied infringement and asserted defenses of invalidity and unenforceability, as well as an antitrust counterclaim that the court bifurcated. NeoMagic Corp. v. Trident Microsystems, Inc., 98 F.Supp.2d 538, 539 (D.Del.2000) (“Markman Order ”).

The parties disputed the meaning of the term “coupling” in the '955 patent and the terms “power supply” and “negative with respect to” in the '806 patent. The district court issued a ruling providing its initial constructions of the disputed terms on May 8, 2000. Id. at 548-54. As the district court’s understanding of the technology evolved, and as the parties fine-tuned their infringement arguments, the court periodically modified the original construction of the disputed terms. In the initial Markman order, the district court gave the term “power supply” its ordinary meaning in the art: “a source of electrical energy, such as a battery, that requires at least two power supply lines to deliver power in an electrical circuit.” Id. at 554. Following another claim construction hearing, the court refined its construction of power supply also to require that the two or more power supply lines “deliver a constant voltage supply of power to an electrical circuit.” NeoMagic, 129 F.Supp.2d at 696. Because the court viewed the invention as requiring that a conventional DRAM process be used, and because a conventional DRAM process taps the substrate at an absolute negative voltage, the court construed “negative with respect to” to require that the second power supply referred to in the claims supply an absolute negative voltage, i.e., a voltage that is negative with respect to ground. Id. at 697. Finally, the court construed “coupling” as used in the '955 patent “to require a voltage potential applied in the substrate that is different than the voltage potential in the logic gates.” Id. at 695.

Based on its construction of the disputed claim terms, the court entered summary judgment of noninfringement for Trident as to all asserted claims of both patents. Because the accused devices applied the same voltage — ground—to both the substrate and the logic gates, they did not meet the “coupling” limitation of the '955 patent as construed by the court. Id. The district court held that the accused devices did not infringe the '806 patent as a matter of law for two reasons: (1) they contained only one power supply as that term was construed by the court; and (2) they tapped the substrate at zero volts, rather than at an absolute negative voltage as required by the court’s construction of “negative with respect to.” Id. at 696-97. NeoMagic now appeals. This appeal rests within the exclusive jurisdiction of this court pursuant to 28 U.S.C. § 1295(a)(1).

II

In an appeal from an entry of summary judgment of noninfringement, we review de novo the first step of the infringement inquiry, which is determining the scope of the patent claims as a matter of law. Karlin Tech., Inc. v. Surgical Dynamics, Inc., 177 F.3d 968, 971, 50 USPQ2d 1465, 1467 (Fed.Cir.1999). Our review of the second step, comparing the properly construed claims to the accused device, involves a de novo assessment of whether any genuine issue of material fact remains in dispute, and then, if not, plenary review of whether the moving party was entitled to judgment as a matter of law. Id. at 974, 50 USPQ2d at 1470.

A

The outcome of this appeal turns on issues of claim construction, for Neo-Magic conceded at oral argument that if we agree with the district court’s construction of the disputed claim terms, then the accused devices do not infringe as a matter of law. We turn first to the '955 patent, which, for purposes of this appeal, contains only one disputed term: coupling. The claim requires that the logic gates have “a coupling to said underlying substrate regions determined by a voltage of said underlying substrate regions.” '955 Patent, col. 10, lines 45-48. The ordinary meaning of “coupling” refers to an electrical communication&emdash;the transfer of energy&emdash;be-tween two circuits, in this case the gates and the substrate. See New IEEE Standard Dictionary of Electrical and Electronics Terms 277 (5th ed.1993) (defining coupling as “[t]he association of two or more circuits or systems in such a way that power or signal information may be transferred from one to another”). The parties dispute what sort of electrical communication is claimed. NeoMagic argues that “coupling” refers to the capacitive coupling across the p-n junction between the gates and the substrate, and that such capacitive coupling is an innate physical property of a p-n junction so long as the junction is either reverse-biased or under no bias. Relying upon the method of building the gate circuitry taught in the specification, Trident argues that the claimed “coupling” occurs only when the substrate and the logic gate are tapped with separate and quantitatively different voltages. The difference in voltage creates a potential difference between the logic circuitry and the substrate, which allows for electrical communication between the two. We agree with Trident, for only its proposed construction is consistent with both the plain language of the claims and the teachings of the specification.

As discussed above, the '955 patent is directed towards a modified logic gate in an integrated circuit that decouples the transistor voltage supply line from that of the substrate in order to prevent latchup. Because prior art DRAM chips contain only a small number of logic gates, latchup in the prior art systems can be prevented by spacing the few necessary gates far apart on the periphery of the chip. '955 Patent, col. 4, lines 16-22. The prior art DRAM logic gate design would not work for the gates of a graphics processor because a graphics processor requires a large number of gates placed close together, and in such a configuration the prior aft DRAM gate design would result in failure due to latchup. Id. col. 4, lines 22-28. The prior art design for the logic cells in a graphics controller taps the substrate at VSs (ground), and uses the same VSs line for the source terminals of the N-channel transistors in the logic gate. The use of the same Vss line results in the two circuits being shorted together, and noise in the substrate can therefore create latchup in the logic gate. The inventors solved this problem by redesigning the logic gate so that it was no longer shorted together with the substrate; in other words, they decoupled the source line for the substrate from the line for the logic gate. However, even though the logic gates and the substrate are no longer shorted together, there still must exist some method of communicating a signal between them because the memory in the DRAM portion of the chip is embedded in the substrate. The patent therefore claims a coupling between the logic gate and the substrate. The question, of course, is what sort of coupling has been claimed.

We begin, as always, with the language of the claim. The patent claims logic gates “having a coupling to said underlying substrate regions.... ” As noted above, the parties agree that “coupling” refers to electrical communication between the two specified components. Their position is consistent with the technical definition of coupling, which means “[a] mutual relation between two circuits that permits energy transfer from one to another, through a wire, resistor, transformer, capacitor, or other device.” McGraw-Hill Dictionary of Scientific and Technical Terms 474 (5th ed.1994); see also Rudolf F. Graf, Modem Dictionary of Electronics 157 (7th ed.1999) (defining coupling as “[t]he association or mutual relationship of two or more circuits or systems in such a way that power may be transferred from one to the other”). The claim further states that the coupling is “determined by a voltage of said underlying substrate.” This indicates, of course, that the voltage applied to the substrate will affect the degree — and possibly the existence of — the claimed coupling between the substrate and the gate. However, this language does not help differentiate between the proposed definitions of NeoMagic and Trident because in both definitions the coupling depends upon the voltage applied to the substrate. In the case of junction capacitance, proffered as the proper definition by NeoMagic, assuming a constant voltage applied to the logic gate circuit, variations in the voltage at the substrate will affect the junction capacitance, thereby altering the capacitive coupling between the two components. In Trident’s formulation, the degree of coupling depends upon the potential difference between the two components, and— again, assuming constant voltage to the logic gate — altering the voltage applied to the substrate obviously changes the potential difference between it and the logic gate. Because the language of the claim does not speak with clarity, we turn to the specification to improve our understanding of the meaning of “coupling.” Robotic Vision Sys., Inc. v. View Eng’g, Inc., 189 F.3d 1870, 1875, 51 USPQ2d 1948, 1952-58 (Fed.Cir.1999).

The specification describes the redesigned logic gate by reference to the figure shown below.

The specification explains that “[t]he logic circuits of the integrated circuit are redesigned to decouple the Vss line connected to the source terminals of the N-ehannel, pulldown transistors from the P-substrate tap.” '955 Patent, col. 4, lines 34-37. In other words, the supply line for the N-channel transistor of the logic circuit is different from that for the substrate. By itself, this explanation would be consistent with either party’s explanation of the term “coupling.” However, the specification then expressly teaches a design in which the voltage supply lines for the two components are at different voltages: “As shown in FIG. 4, the source of the N-channel, pulldown transistor 35 of a representational logic circuit is connected to a Vss line 45 (at 0 volts), while the substrate is tapped by a VBB line 47 (at — 1.5 volts).” '955 Patent, col. 4, lines 38-42. While it would be improper to limit the claims to the particular voltages used in the preferred embodiment (zero and — 1.5 volts), it is perfectly clear that the specification contemplates that the two voltages be different from each other, regardless of their absolute value. Notably, this is the only place in which the specification describes the interaction of the logic circuitry and the substrate, and it specifically requires that different voltages be applied to the substrate and the logic circuit. As Trident notes, this description is fully consistent with its proposed definition of the term “coupling” because, under Trident’s definition, coupling is attenuated if the two circuits are at different potentials, thereby achieving the object of the invention: permitting substantial amounts of memory and logic to operate on the same integrated circuit -without interfering with one another. We agree, and hold that, consistent with the specification, the term coupling requires that the voltage applied to the substrate be different from that applied to the logic circuit. Thus, the coupling is “determined by a voltage of said underlying substrate regions” because the extent of electrical coupling is dependent upon the voltage difference applied between the substrate and the logic circuit.

Under this construction of “coupling,” the accused devices do not infringe the '955 patent as a matter of law. This is so because Trident’s devices tap both the substrate and the logic circuit at the same voltage: Vss — zero volts. Therefore, we affirm the district court’s judgment that Trident’s devices do not have the claimed coupling limitation and do not infringe the '955 patent.

B

Turning to the '806 patent, the parties dispute the meaning of the-terms “power supply” and “negative with respect to.” Claims 7 and 18 of the '806 patent recite both a “first power supply” and a “second power supply.” The specification does not provide a specific definition of power supply, and thus the term should carry its ordinary meaning in the art. Johnson Worldwide Assoc., Inc. v. Zebco Corp., 175 F.3d 985, 989-90, 50 USPQ2d 1607, 1610-11 (Fed.Cir.1999); Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582, 39 USPQ2d 1573, 1576-77 (Fed.Cir.1996). NeoMagic argues that each individual power supply line is a “power supply.” The district court held, and we agree, that one of ordinary skill in the art would understand power supply to mean “a source of electrical energy ... that requires at least two power supply lines to deliver power in an electrical circuit.” Markman Order, 98 F.Supp.2d at 554. A power supply requires two lines because there must be .both a source line and a return line in order for current to flow. In other words, because power cannot be applied to a circuit without both a source line and a return line, a “power supply,” in order to function as such, requires at least two supply lines.

NeoMagic contends that this construction would exclude its preferred embodiment from the scope of the claims. NeoMagic asserts that its on-chip bias generator, which biases the substrate with a voltage VBB, has only one supply line. Thus, says NeoMagic, the inventors obviously could not have intended “power supply” to require anything more than a single supply line at a particular voltage. If this were an accurate description of the on-chip generator, it would be a powerful argument in favor of NeoMagic’s construction. However, as admitted by NeoMagic’s own expert, Mr. McAlexander, on-chip generators do have a return line in addition to the source fine. In fact, they have multiple return lines; so many that it is customary in the art not to draw them in diagrams or refer to them. When asked whether Trident’s expert correctly described and drew an on-chip bias generator, McAlex-ander replied that Trident’s expert had “generally described the construct of a substrate bias generator with respect to one terminal versus two versus three.” He then explained that with respect to the number of terminals, the bias generator is

typically viewed as a single-terminal output supply VBB, which in the classical sense with P-type substrate material, generates a negative voltage level that is below the classical understood Vss level of zero volts. But in terms of having a second terminal or a return, in all truth, the reason why designers don’t draw it that way is because there’s multiple returns. There’s not any single return.

Because a substrate bias generator does contain at least one return line in addition to the supply line VBB, it would fall within a construction of “power supply” that requires at least two lines.

In the final iteration of its claim construction, the district court held that one of skill in the art would interpret “power supply” to provide a “constant voltage supply of power.” NeoMagic, 129 F.Supp.2d at 696. Trident proposed this “constant voltage” definition because in its view it “fairly draws the distinction between the substrate bias generator and the split bias device.” Id. According to Trident, “the substrate bias generator is designed to. produce as constant a voltage as possible, whereas the BIAS line is a signal line used as a control voltage line which changes in magnitude to keep the current sources in the [digital-to-analog converter] at a constant value.” Id. The district court agreed with Trident’s expert on this point, holding that “a person of ordinary skill in the art would find the substrate bias generator is a power supply and the BIAS line in the split bias device is not.” Id. The court therefore adopted Trident’s proposed definition to the extent necessary “to clarify the normal and ordinary' meaning of the term ‘power supply.’ ” Id.

NeoMagic argues, and we agree, that the court arrived at the constant voltage definition by examining the BIAS line of the accused device and, in effect, construing the claims to exclude it. It is well settled that claims may not be construed by reference to the accused device. SRI Int’l v. Matsushita Elec. Corp. of Am., 775 F.2d 1107, 1118, 227 USPQ 577, 588 (Fed. Cir.1985) (en banc). Nevertheless, the error is harmless if the court’s construction is correct and the term “power supply” does, in fact, require a constant voltage. However, Trident has pointed us to no probative evidence of record, either intrinsic or extrinsic, to support its proposed constant voltage construction. To the extent that evidence does exist in the record, it appears as part of an infringement analysis, i. e., as part of Trident’s expert witness Mr. Murphy’s testimony that the BIAS line would not be regarded as a power supply by one of skill in the art. It goes without saying that whether the accused device supplies a constant voltage or not is irrelevant to the proper interpretation of the claim term “power supply.”

Unfortunately, on the record before us, we are unable to say with certainty whether or not one of skill in the art would understand that a power supply is designed to provide a constant voltage to a circuit. Given the complex technology involved _ in this case, we think that this matter can only be resolved by further evidentiary hearings, including expert testimony, before the district court. We note, however, that should the district court decide that the proper claim interpretation requires a constant voltage source, the court should take care to further define constant, since “constant voltage” is itself a somewhat ambiguous term. As the district court noted, “some power supplies can come closer to ideal than others” in terms of constant voltage supply, NeoMagic, 129 F.Supp.2d at 696, and the court should consider the impact of the degree of fluctuation of the preferred embodiment, the on-chip substrate bias generator, on the definition of constant. It is elementary that a claim construction that excludes the preferred embodiment “is rarely, if ever correct and would require highly persuasive evidentiary support.” Vitronics, 90 F.3d at 1588, 39 USPQ2d at 1578. Thus, while we affirm that power supply means “a source of electrical energy ... that requires at least two power supply lines to deliver power in an electrical circuit,” Markman Order, 98 F.Supp.2d at 554, we vacate and remand for further proceedings that portion of the court’s summary judgment holding that the “power supply” limitation requires a constant voltage supply.

The other disputed term in the '806 patent is the phrase “negative voltage with respect to.” All the parties agree on the meaning of “voltage”; the only dispute concerns the meaning of “negative with respect to.” The claims recite a second power supply that is at a negative voltage with respect to a first power supply. As we noted above, the district court construed “negative with respect to” to mean negative with respect to ground, i.e., an absolute negative voltage. NeoMagic argues, and we agree, that the district court’s construction was in error. The plain language of the claim recites relative voltage rather than absolute voltage. As NeoMagic notes, if the inventors had meant to claim an absolute negative voltage, they need not have used the words “with respect to”; “negative” would have sufficed. Indeed, “negative with respect to said first power supply” is inconsistent with a description of absolute voltage, because absolute voltage is relative to ground.

Because the plain language of the claim compares the second power source to a first power source with an output that need not be at ground, it is referring to relative voltage. As discussed above, one point can be negative with respect to another without being negative with respect to ground. Thus, the appropriate construction of “negative with respect to” is simply that the second power supply must have a voltage that is less positive than that of the first power supply. The second power supply need not have a voltage output that is negative with respect to ground, however, to meet this limitation.

The definition we adopt today is completely consistent with the specification. The invention described and claimed in the '806 patent is the isolation of a capacitor in an n-well on a p-substrate, where the p-n junction between the n-well and p-substrate is reverse-biased. Reverse-biasing simply requires that the voltage applied to the p-substrate be negative relative to that applied to the n-substrate. It does not require that an absolute negative voltage be applied to the p-substrate. In context, the “negative with respect to” language in the '806 patent clearly refers to reverse-biasing the claimed p-n junction. And, because only relative negative voltage (not absolute negative voltage) is required to reverse-bias the junction, the claims naturally use the words “negative with respect to” to recite the required conditions for reverse-biasing. Thus, the proper definition of “negative with respect to” requires only that the voltage supplied by the second power supply be negative relative to that provided by the first power supply.

Because we have materially altered the district court’s construction with respect to the '806 patent, we vacate the court’s judgment of noninfringement and remand for further consideration in light of our opinion. As discussed above, on remand the court should take further steps to determine whether the claimed “power supply” must provide a constant supply of voltage. Furthermore, we note that in light of its decision on the terms “power supply” and “negative with respect to,” the court withdrew an initial decision regarding whether the claims require the capacitor to be located in the graphics engine. NeoMagic, 129 F.Supp.2d at 697. It will, of course, be open to the court and the parties to revisit that issue on remand.

CONCLUSION

For the reasons given above, we affirm the court’s entry of summary judgment of noninfringement as to the '955 patent. However, as to the '806 patent, the district court erred in its construction of the term “negative with respect to.” Furthermore, while the court’s construction of “power supply” is largely correct, the evidence of record does not permit a determination of whether the claimed power supply must provide a constant voltage. Thus, we vacate the court’s judgment of noninfringement of the '806 patent and remand to the district court for further proceedings on the proper construction of “power supply” and whether the accused devices infringe under the proper interpretation of the claims.

COSTS

No costs.

AFFIRM-IN PART, VACATE-IN-PART, AND REMAND. 
      
      . For a semiconductor to conduct electricity, it must be doped, i.e., other elements must be added into the semiconductor crystal. A p-type semiconductor is doped with elements that have a large number of positive-charge carriers, or holes. In contrast, an n-type semiconductor is doped with elements having free electrons, which function as negative charge carriers. The positive and negative charge carriers can roam freely through the crystal lattice of the p- or n-type semiconductors. Electric current through a semiconductor is carried by the flow of both positive and negative charge carriers.
     
      
      . Voltage is always a relative term. It refers to the existence of a potential difference between -two points on a circuit. Voltage is measured in volts, and a potential difference of one volt causes one amp of current to flow through one ohm of resistance. So-called absolute voltage is measured relative to a point at ground, which is defined as zero volts. But voltage need not be measured relative to ground — it can be measured relative to any other point as well. So, if point A has more free electrons than point B, point A is at negative voltage with respect to point B. However, point A could be negative with respect to point B, while still being at positive voltage with respect to ground.
     
      
      . NeoMagic has not presented us with any arguments based on infringement under the doctrine of equivalents, so only literal infringement is at issue in this appeal.
     
      
      . The evidence of record on appeal suggests that the on-chip generator fluctuates by approximately 0.5 volts in either direction of its setting.
     