
    TM PATENTS, LLP, et al. Plaintiffs, v. INTERNATIONAL BUSINESS MACHINES CORP., Defendant.
    No. 97 CIV. 1529(CM) (MDF).
    United States District Court, S.D. New York.
    Jan. 15, 2001.
    
      Dennis J. Mondolino, Stephen B. Jud-lowe, P.C., Hopgood, Calimafde, Judlowe & Mondolino, LLP, New York City, for Plaintiffs.
    Christopher A. Hughes, Christopher K. Hu, Morgan & Finnegan, LLP, New York City, for Defendant;
   DECISION AND ORDER GRANTING IN PART AND DENYING IN PART DEFENDANT’S IN LIMINE MOTION FOR SUMMARY JUDGMENT OF NONINFRIGNEMENT OF U.S. PATENT NO. 4,899,342

McMAHON, District Judge.

On November 29, 2000, the United States Court of Appeals for the Federal Circuit handed down an opinion that, in the view of defendant IBM Corporation, disposes of the last remaining issues in this complicated software patent case. In Festo Corp. v. Shoketsu Kinzoku Kogyo Kabushiki Co., Ltd., 234 F.3d 558, 56 USPQ2d 1865 (Fed.Cir.2000), the court most responsible for patent jurisprudence in this country — and one whose edicts I am bound to follow in this area — overruled or abrogated eight of its most oft-cited decisions concerning the judicially-created “doctrine of equivalents.” The Federal Circuit ruled that no range of equivalents was available for any claim limitation that had been amended during prosecution for reasons related to patentability. Indeed, the Federal Circuit announced that prosecution history estoppel created an “absolute bar” to the application of the doctrine of equivalents — a result that at least some members of the Court of Appeals recognized as overbroad (and from which several members dissented), but that was found to best serve the goals of notice and disclosure identified by the United States Supreme Court as primary in Warner-Jenkinson Co. v. Hilton Davis Chemical Co., 520 U.S. 17, 29, 117 S.Ct. 1040, 137 L.Ed.2d 146 (1997). See Festo, 234 F.3d at 576.

In view of Festo, IBM moves (on the eve of trial) for summary judgment dismissing plaintiffs claims for patent infringement by its RAID 5, RAID 6 and Shark products. Plaintiffs argue strenuously that Festo does not apply — both because IBM’s products literally infringe the ’342 patent and because TM’s amendments to the ’342 claims in suit did not narrow the scope of the claims.' At the very least, they urge that the Court find questions of fact concerning both literal and by-equivalents infringement that must be presented to a jury-

Having read the parties’ submissions and considered Festo at length, I conclude that (1) plaintiff amended certain key limitations within the claims in suit during prosecution of the patent for reasons that were explicitly related to patentability; (2) those amendments had the effect of narrowing the claims; (3) in light of Festo, the doctrine of equivalents cannot be applied to those limitations as a matter of law. Thus, for reasons discussed below, there is nothing for a jury to decide concerning infringement of the ’342 patent by equivalents, and to that extent plaintiffs’ claims are dismissed.

As to' the issue of literal infringement: While recognizing the existence of a particularly thorny question of law, I conclude that a jury should decide whether the devices employed to detect and correct errors in IBM’s products are the literal equivalent of the “error correction code” (singular) referred to in claim limitation vii (a limitation that can only be infringed literally).

The ’342 Patent

I have written two lengthy opinions in this matter, as well as several brief memo-randa. I therefore do not intend to reiterate what is set forth fully in those prior decisions. In particular, the reader is referred to the Court’s so-called Markman decision, TM Patents, L.P. v. International Bus. Mach. Corp., 72 F.Supp.2d 370 (S.D.N.Y.1999) (“Markman Opinion”), for a discussion of the ’342 patent and the claims in suit.

However, when I denied IBM’s motion for summary judgment on the ground that its products did not infringe the ’342 patent, I did so in summary fashion, noting two things: (1) summary judgment was rarely, appropriate in cases where the technology was complex and expert testimony was required to understand it, Caterpillar, Inc. v. Deere & Co., 224 F.3d 1374 (Fed. Cir.2000); and (2) there were issues of fact (largely concerning the issue of equivalents) that precluded summary judgment, TM Patents, L.P. v. International Bus. Mach. Corp., 107 F.Supp.2d 352, 353 (2000) (unpublished). I did not then take the time to identify what those issues of fact were, or whether there were issues as to which there was no dispute. Because I now need to address this issue again, I must set out some information about the ’342 patent and IBM’s allegedly infringing products.

The first patent in suit is a patent for a computer system that detects and corrects errors in data stored in the computer. The two genuinely inventive features of the claimed system are (1) its use of a single, unitary error correction code (“ECC”), defined as a group of mathematically interrelated bits, see Markman Opinion, 72 F.Supp.2d at 381, that has the capacity, not just to detect errors in data, but to correct them as well, and (2) spare disk drives that “backed up” the corrected data, so that there were always two copies in the system. The disk storage array described in the ’342 patent consists of 32 dedicated data disks and 7 dedicated EEC disks, plus 3 spare disks.

The storage array in the ’342 patent is connected to a computer by a 64-bit bus (a bus is a conductor along which data is transmitted), which in turn is connected to a specialized bus adapter, including an ECC generation circuit, within the array that is connected to the disk drive. During transmission of data to the disk array, a 64-bit wide data stream enters the adapter and is split into two 32-bit groups. Each of these 32-bit groups is transmitted to the ECC generation chip to generate a 7-bit ECC. Thereafter, each block of 32 bits and the accompanying ECC bits are sent to all 39 disks in the array through 39 shift registers (computer hardware elements designed to perform shifting of the data contained within them). Data is stored in bit-striped mode, meaning that one bit of each of the 32-bit groups of data is stored separately on each of the 32 disk drives.

The 32 data bits and ECC bits are sent together from all 39 disks in the array via the shift registers to the specialized bus adapter, where, using the data and error correction code, the ECC generation circuit chip performs an error detection and correction function on the data bits and delivers the corrected data to the computer. If there is a disk drive failure, the corrected data can be stored on a spare disk.

The claims in the ’342 patent that are pertinent to the pending motion for summary judgment are the two independent claims; 1 and 7. They have been construed to be congruent, so I will limit my discussion to Claim 1, and specifically to limitation (vii) thereunder — the so-called “means for generating” limitation — on which IBM relies for both prongs of its motion. The claim reads as follows:

(vii) Means for generating from the digits of a block of data and associated error correction code read from said memory units a digit which corrects an error in a digit read from one of said memory units, said generating means operating on a sequence of said blocks of data and associated error correction codes to generate a sequence of correct digits....

This claim was interpreted in accordance with the dictates of 35 U.S.C. § 112(6), which was inserted into the patent laws after the United States Supreme Court invalidated so-called “means-plus-function” claims limitations. See Halliburton Oil Well Cementing Co. v. Walker, 329 U.S. 1, 13, 67 S.Ct. 6, 91 L.Ed. 3 (1946). Recitations that are properly considered to fall within this rule are construed differently than other limitations, in that any infringing device or process must both perform the identical function as does the claimed invention, and must do so with a structure that is either identical to or the equivalent of that described in the specification. Odetics, Inc. v. Storage Technology Corp., 185 F.3d 1259, 1266-67, 51 U.S.P.Q.2d 1225 (Fed.Cir.1999). Literal infringement of a means-plus-function claim occurs when the allegedly infringing product performs the identical function (and it must be the IDENTICAL function — not substantially the same function in this case), using a structure that is identical to or equivalent to the structure in the specification. See Chiuminatta Concrete Concepts, Inc. v. Cardinal Indus., Inc., 145 F.3d 1303, 1308, 46 USPQ2d 1752 (Fed.Cir.1998), citing Pennwalt Corp. v. Durand-Wayland, Inc., 833 F.2d 931, 934, 4 USPQ2d 1737, 1739 (Fed.Cir.1987) (en banc). Because structural equivalence under § 112(6) is NOT part of the “doctrine of equivalents” implicated in Festo, see, e.g., Alpex Computer Corp. v. Nintendo Co., 102 F.3d 1214, 40 USPQ2d 1667 (Fed.Cir.1996) cert. denied, 521 U.S. 1104, 117 S.Ct. 2480, 138 L.Ed.2d 989 (1997); Valmont Indus., Inc. v. Reinke Mfg. Co., 983 F.2d 1039, 25 USPQ2d 1451 (Fed.Cir.1993) (same), one can have literal infringement of a means-plus-funetion patent by a structure that is not identical to the disclosed embodiment — i.e., with an equivalent structure. See Odetics, Inc., 185 F.3d at 1267. But one cannot have literal infringement when the allegedly infringing function is equivalent to, rather than identical to, the disclosed function. See id. Only the doctrine of equivalents implicated by Festo is available in such a case.

In this case, I have construed limitation vii as follows:

Here, the claimed function is to generate a corrected bit by reading all of the bits of a block of data and its associated error correction code, including any erroneous bit. The disclosed structure of this claim is a Texas Instrument semiconductor chip, or its structural equivalent, which generates a corrected digit using a Hamming code, or its structural equivalent.

Markman Opinion at 384. Thus, to have literal infringement, the allegedly infringing devices must “generate a corrected bit by reading all of the bits of a block of data and its associated error correction code, including any erroneous bit.” Any IBM device that performs this exact function (NOT an equivalent function) will literally infringe the patent, whether it performs the function using a TI chip that generates a Hamming code or the structural equivalent of that chip and code.

Festo Bars TM’s Reliance on the Doctrine of Equivalents

(a) The Federal Cimdt’s Opinion in Festo

I cannot possibly do justice to the Federal Circuit’s decision in Festo in an opinion in limine. For our purposes, the relevant portions of the opinion can be summarized as follows:

1. The Federal Circuit, following the United States Supreme Court in Warner-Jenkinson Co. v. Hilton Davis Chemical Co., 520 U.S. 17, 117 S.Ct. 1040, 137 L.Ed.2d 146 (1997), reaffirmed the continuing vitality of the judicially-created “doctrine of equivalents,” which prevents an accused infringer from avoiding liability for infringement by changing only minor or insubstantial details of a claimed invention while retaining the invention’s essential identity. Festo, 234 F.3d at 564.

2. The court, again following Warner-Jenkinson, recognized that an overly broad application of the doctrine of equivalents conflicts with the definitional and public-notice functions of the claiming requirement under the patent statute. Id.

3. The court recognized that the doctrine of prosecution history estoppel, which precludes a patentee from obtaining under the doctrine of equivalents coverage of subject matter that has been relinquished during the prosecution of the patent application, was a useful tool for preventing the doctrine of equivalents from vitiating the notice function claims. Id.

4. Warner-Jenkinson, while refusing to abolish the doctrine of equivalents entirely, held that, when a patentee amended his application during prosecution for a substantial reason related to patentability — or when the patentee was unable to establish a reason for an amendment that was unrelated to patentability — prosecution history estoppel would apply. Id. at 565-66.

5. Reasoning from language in Warner-Jenkinson, the Federal Circuit, sitting en banc, set the following rules to govern the application of patent history estoppel when the patentee had amended his application:

(a) For purposés of determining whether an amendment gives rise to prosecution history estoppel, a “substantial reason related to patentability” is not limited to Overcoming or avoiding prior art, but instead includes any reason which related to the statutory requirements for a patent. Therefore a narrowing amendment made for any reason related to the statutory requirements for obtaining a patent will give rise to prosecution history estoppel with respect to the amended claim element. Id. at 566. (unanimously adopting the rule)
(b) This rule applied whether the amendment was made voluntarily or was required by the Examiner. Id. at 568. (unanimously adopting the rule)
(c) If a claim amendment creates prosecution history estoppel with regard to a claim element, then there is no range of equivalents available for the amended claim element. In other words, application of the doctrine of equivalents is completely barred in such a circumstance. Id. at 569. (adopting rule over four dissents)
(d) When no explanation for a claim amendment is established, it will be presumed that the amendment was made for a reason related to patentability, and the rule of (iii) will apply — i.e., no range of equivalents will be available in such a case. Id. at 578. (This rule has no application to the instant case.)

The cataclysmic portion of that ruling is, of course point 5(c), which involved the explicit overruling of some eight identified Federal Circuit decisions. The Court of Appeals reached its result after concluding that the current state of the law regarding the available scope of equivalents following amendment was “unworkable,” id. at 575, and that a flexible approach to prosecution history estoppel (i.e., allowing some range of equivalents to the patentee after amendment) was inconsistent with the notice and definitional functions of the patent laws. Id. at 575-76. The court thus opted for the “complete bar” rule, and indicated that, for the sake of certainty about what fell within the scope of the patent, amendments related to patentability would be construed strictly against the inventor. Id. The rule adopted by the Federal Circuit applies to any amendment that narrows the scope of the claim for a reason related to patentability, id., whether the given amendment was “material” to the prosecution of the patent. Id. at 576.

Following this discussion, the Federal Circuit gave explicit guidance for district courts to follow when the patent hold- - er relied on the doctrine of equivalents: first, whether prosecution history estoppel applies to bar reliance on the doctrine, and second, if it does not, whether the allegedly equivalent embodiment satisfies the “all elements” rule. Id. at 586. These two issues are to be determined “by the court, either on a dispositive pretrial motion or on a motion for judgment as a matter of law at the close of the evidence and after the jury verdict.” Id. Thus, they must be held to raise only questions of law, not of fact, and any disputes that must be resolved in answering them — including whether the patentee’s amendment narrowed the scope of the claim and whether it was made for a reason related to patent-ability — are to be resolved by the judge, not submitted to the jury.

(b) Why Festo Bars TM’s Reliance on the Doctrine of Equivalents

Having carefully reviewed the record and the parties’ excellent briefs, I am constrained to conclude that limitation (vii) of Claim 1 (and the corresponding limitation in Claim 7) in the ’342 patent falls squarely within the rule of Festo, and that the complete bar rule applies in this case.

(1) The Amendment Was Made for Reasons Related to Patentability.

The first issue I must determine is whether the narrowing amendment inserted by TM .into its patent application was made for reasons related to patentability. There can be no question that this is the case.

TM filed its original application on February 1, 1988. In an Office Action dated March 15, 1989, the Patent Office rejected the application, including the “generating” claim elements (limitations vii and viii) as indefinite (35 U.S.C. § 112) and as obvious in view of prior art (35 U.S.C. § 103). (Pi’s Mem. at Ex. B.) Specifically, claims 1 and 6 (which became the current claims 1 and 7) were deemed indefinite for failing to point out and distinctly claim the subject matter which the applicant regards as the invention — i.e., the claims were over-broad — and because the language “across the plurality of memory units” used in the original claims “does not have a clear technical meaning.” (Id., Serial Number 150,-814, Office Action, at 2). Additionally, these and all the rest of the claims 1-8 in the original application were rejected as being obvious (35 U.S.C. § 103), and un-patentable over Dutton, U.S. Pat. No. 4,654,847, in view of Fossati, U.S. Pat. No. 4,646,304. (Id. at 3.)

In response to this Office Action, TM amended the claims. Logic dictates that it did so in order to overcome these objections to patentability. But lest the obvious inference prove insufficient, TM acknowledged that this was so, stating at the outset of the “Remarks” section of its amended filing as follows:

In response to this office action a new specification is being supplied herewith and the claims have been amended extensively ... With respect to the rejection under 35 U.S.C. 112, claims 1 and 6 [now 7] have been revised to avoid using the phrase “across a plurality of memory units.” (emphasis added)

And later in those “Remarks,” while discussing the amendments made to overcome obviousness:

The claims have been amended to emphasize these differences between applicants’ invention and the prior art. In particular, each independent claim [i.e., what are now claims 1 and 7] has been amended to clarify the nature of the spare read/write memory unit and, in particular, the fact that it is similar in operation to one of the other read/write memory units.... Each of the independent claims also distinguishes over Dut-ton in requiring that a sequence of correct digits be generated and stored in the spare read/write memory unit.

The “extensive” amendments made by TM (“extensive” being TM’s own choice of words) were indubitably made to overcome objections to patentability.

Any suggestion to the contrary made by TM today is of no moment. Indeed, in Festo, the Federal Circuit so held. Patentee Festo had argued in a supplemental brief on remand that its amendment was made to “clarify the claim,” not to change it, and that the original language was simply “rewritten more clearly.” The Court of Appeals had no difficulty dismissing the patentee’s assertion, saying:

This assertion is inadequate to escape the Warner-Jenkinson presumption, however, because nothing in the prosecution history of the Stoll patent indicates that the magnetizable sleeve element was merely added for purposes of clarification unrelated to patentability issues.

Festo at 588 (emphasis added). Thus, it is to the prosecution history of the patent, not to post hoc declarations, that I am to look for evidence about why particular amendments were made. And the prosecution history of the ’342 patent seems clear enough to me. The amendments were made in response to patent office objections related to patentability. The excerpts from the “Remarks” section of the amendment quote above, as well as the rest of the text of the- “Remarks,” are devoid of any suggestion that the new language was added solely for purposes of clarification.

(2) The Amendment Narrowed the Scope of the Claim

Of course, not every amendment related to patentability — not even every “extensive” amendment — will bar reliance on the doctrine of equivalents. Festo, by its terms, applies only to amendments that narrow the scope of patent claims. Festo rests on the proposition that the patentee surrendered something — gave it up — by amending his claim. Thus, if an amendment broadens a claim by adding something to the original claim, rather than subtracting something from it, Festo’s complete bar rule does not apply.

TM argues strenuously that its amendment did not narrow the claim — it simply reworded it. IBM counters, just as strenuously, that on its face, the amendment narrowed the claim. Again, merit falls squarely on the side of IBM.

TM’s argument is far from persuasive. It is hard for this court to see how simply rewording a claim would overcome an patent examiner’s obviousness or prior art objections. An amendment has to change something' — otherwise, it is not an amendment. Indeed, it has been held that “clarifying” amendments are narrowing, in that they constitute an admission that “the claims as originally drafted did not limit” the invention appropriately — otherwise, there would be no need for clarification. Pickholtz v. Rainbow Techs., Inc., 125 F.Supp.2d 1156, 1163 (N.D.Cal.2000).

However, assuming, arguendo, that an amendment could neither broaden nor narrow, but instead only “clarify” a claim, I am constrained to find that TM’s amendments were not merely “clarifying.” Just looking at the amendment to limitation (vii) is enough to convince me that the original claim was narrowed. The original limitation in Claim 1 read as follows:

means for generating from a sequence of blocks of data and associated error correction codes read from said memory units a sequence of bits which correct an error in information read from one of said memory units...

It was amended to read as follows:

means for generating from [a sequence of blocks] the digits of a block of data and associated error correction code[s] read from said memory units a [sequence of bits] digit which corrects an error in [information] a digit read from one of said memory units, [a sequence of bits which correct an error in information read from one of said memory units] said generating means operating on a sequence of said blocks of data and associated error correction codes to generate a sequence of correct digits.(Deletions are in parentheses; additions are in bold)

I find that there are at least four ways that this amendment narrows the original claim.

1. The Claims Were Narrowed To Require Use Of A Single Error Correction Code

The generating element of the claims was narrowed to require a single error correction code. The original claims of the ’342 patent recited “correct[i'ng] an error in information” using “error correction codes” (plural). Thus, the original claims might arguably cover use of multiple error correction codes to “correct an error in information.” Thus, systems that used two codes, three codes or ten codes might arguably be covered.

During prosecution of the ’342 patent, however, the claims were amended to require “correct[ing] an error in a digit” using an “error correction code” (singular). Now, only systems that use a single code to detect and correct are covered by the claims. This is clearly a narrowing.

By this narrowing amendment, plaintiffs thus surrendered the ability to cover the use of multiple error correction codes to correct an error in a data block. Festo, at 575-76. (“ ‘By amendment [the patentee] recognize[s] and emphasize[s] the difference’ between the original claim and amended claim and ‘proclaim[s] ... abandonment of all that is embraced in that difference,’ ”) (quoting Exhibit Supply Co. v. Ace Patents Corp., 315 U.S. 126, 136, 62 S.Ct. 513, 86 L.Ed. 736 (1942)). For this reason alone, under Festo, application of the doctrine of equivalents to the means plus function limitation is completely barred. Id.

2. The Claims Were Narrowed To Define With Particularity The Interdependency Of The Block Of Data, Its Associated Error Correction Code And The Digit Which Corrects An Error

The claims were also narrowed by particularly defining the functional interdependency between an individual block of data and its associated error correction code and the “digit” which is corrected. Adding such an interrelationship is classic claim narrowing. I. Kayton, Patent Practice § 3.8-3.9 (PRI, 6th ed.1997) (a claim may be narrowed by “modify[ing] or qualifying] the inteiTelationship of that element to others.” “[Njarrowing through modification or qualification may also be accomplished by specifying a variation in the interrelationship of the elements rather than changing the structure of a previously recited element.”).

The original claims merely called for “generating from a sequence of blocks of data and associated error correction codes .;. a sequence of bits which correct an error in information ...” There was no defined relationship stated among the “sequence of blocks of data,” “associated error correction codes” and “sequence of bits which correct an error in information.” For example, the original claims do not require a one-to-one-to-one correspondence between the “blocks of data”, “associated error correction codes” and “sequence of bits which correct an error in information.” The original claims arguably covered two, three, four, or more error correction codes operating in concert on one block of data to correct an unspecified error (e.g., one-bit, two-bits, or more) in some information (which is undefined insofar as its relation to any data block or error correction code is concerned).

As amended, however, the claims provide “generating from the digits of a block of data and associated error correction code ... a digit which corrects an error in a digit ...,” specifically define the interdependency of the “block of data,” “error correction code” and “a digit which corrects an error • in a digit.” Unlike the original claims, the amended claims require both a specific one-to-one-to-one correspondence between each “block of data”, its “associated error correction code” and the “digit which correct an error in a digit.”

By these narrowing amendments, the applicants surrendered the ability to cover multiple error correction codes operating in concert on each block of data to correct an error in some undefined information. See Pickholtz, at 1162-63 (granting summary judgment of non-equivalents based on Festo because applicants “narrowed his claims to include spatial limitations”). Thus, under Festo, application of the doctrine of equivalents is completely barred. This is, in any event, classic file history estoppel.

3. The Claims Were Narrowed To Particularly Define The Interdependency Of The Block Of Data And The Error Contained In The Block Of Data

The claims were also narrowed to particularly require that the block of data contain an error. In the original claims there was arguably no one-to-one correspondence between the “error” and each block of data. The original claims arguably covered operating on multiple data blocks only some of which actually contained errors. Unlike the original claims, in the amended claims there is a specific one-to-one correspondence between the “error” and the “block of data”, ie. each block of data being operated on contains an error.

By this narrowing amendment, the applicants surrendered the ability to cover systems in which an error correction code operates on any data block, whether or not it contains an error. See Pickholtz, at 1162 (amending claim to require hardware to be “located in the computer” completely barred equivalents). Thus, under Festo, application of the doctrine of equivalents is completely barred.

4. The Claims Were Narrowed To Require The One-To-One-To-One Function To Be Performed On A Sequence Of Blocks

Plaintiffs point to the addition of the 24 words at the end of the generating element to suggest that the wording of the claim element was merely shifted around. However, plaintiffs ignore the changes made in the portion of the generating claim element preceding those 24 words. It is in that earlier portion of the claims that the narrowing amendments noted above were made. The last 24 words added to the claims state an even further limitation that the narrowly-defined function as now specified in the earlier portion of the claims must also proceed to operate on a sequence of blocks of data and' error correction codes in the identical bit-by-bit manner, block-by-block. Unlike the original claims, which referred to reading a sequence of blocks of data and error correction codes to “correct an error in information” specifying no particular way of doing that function, the amended claims require “correcting] an error in a digit”. Thus, the original claims might cover accused devices which correct one bit, two bits, ten bits or more bits of “information”, while the amended claims cover only systems that correct one bit within a single block and must also then proceed to do so on a block by block basis. This is clearly a narrowing.

* * * * * *

The conclusion that this limitation has been amended in a way that brings it squarely within the doctrine of Festo is inescapable. As a matter of law, plaintiffs cannot argue to the jury that IBM’s products perform substantially the same function as “generating a corrected bit by reading all of the bits of a block of data and its associated error correction code, including any erroneous bit.” Therefore, IBM is granted summary judgment of non-infringement of limitation (vii) under the doctrine of equivalents. Unless this element is literally infringed, TM has no case. (See infra.)

An Issue of Fact with Respect to at Least Some IBM Products Precludes Summary Judgment of Non-Infringement in This Case

With any possibility of proving infringement by equivalents foreclosed by Festo, IBM has renewed its prior motion to dismiss TM’s literal infringement claim. I apply to that motion the usual rules followed on such motions, with the particular caveat that summary judgment is often inappropriate in patent cases where the technology is complex and expert testimony is going to be necessary. See Caterpillar, Inc., v. Deere & Co., 224 F.3d 1374 (Fed.Cir.2000).

Literal infringement of a claim exists when every limitation recited in the claim is found in the accused device, i.e., when the properly construed claim reads on the accused device exactly. Cole v. Kimberly-Clark Corp., 102 F.3d 524, 532 (Fed.Cir.1996). Thus, there can be no literal infringement if the accused IBM products fail to read on even one limitation in the claims in suit. Kahn v. General Motors Corp., 135 F.3d 1472, 1477 (Fed.Cir.1998).

Where literal infringement of the “means for generating” claim is concerned, the first question for the Court is whether the allegedly infringing products perform the identical (that is, the exact same) function that is performed by the ’342 patent. Intellicall, Inc., v. Phonometrics, 952 F.2d 1384, 1388-89 (Fed.Cir.1992). If it does not, then there can be no literal infringement, regardless of whether the structures used by IBM are the functional equivalent of the TI chip and the Hamming code. As noted above, the function that must be identical as between the patent and the infringing products is as follows: “generate a corrected bit by reading all of the bits of a block of data and its associated error correction code, including any erroneous bit.” The function is not limited to “generating a corrected bit;” rather, the function contemplates performing the act of “generating a corrected bit” in a particular way — by reading all of the bits of a block of data and its associated error correction code, including any erroneous bits.

At a telephone conference among counsel and the Court on January 12, 2001, it became clear that there is no real dispute about how IBM’s allegedly infringing products work. While there are differences between RAID 5 and RAID 6 technology, the main elements for all the targeted products are virtually identical. An error correction device of some sort (I refrain from using the word “code” because it is a loaded word in this context) reads the information for which the computer is looking. If it encounters a data word (a group of digits) containing an error, the computer “fetches” (as TM’s counsel colorfully described it) the rest of the data in the block where the faulty word was detected by the error correction device. Using parity, which is a data correcting mechanism, it reads all the data in the block except the word containing the error, and reconstitutes the faulty data word so that it is correct.

IBM argues that this process does not infringe literally on the ’342 patent, because: (1) the codes that detect the error and the codes (parity) that correct it are not part and parcel of the same, single “error correction code” for which the function calls, so (2) no single “error correction code” reads “all of the bits of a block of data and its associated error correction code, including any erroneous bit.” TM ripostes that the combination of parity plus some error detection mechanism (which varies depending on the product involved) does indeed constitute a single (or unitary) error correction code, and insists that there is literal infringement because some portion of this multi-faceted code does indeed read all the bits of the block of data, including its associated error correction code and any erroneous bit, as the detection and correction function is carried out.

The first difficulty raised by these arguments is the close relationship, if not overlap, between the function claimed in the patent (as interpreted by me in the Mark-man decision) and the structural elements that carry out that function. I have always understood that the question of whether a combination of parity plus on-disk correction codes (or, I suppose, longitudinal redundancy codes, though they differ in significant ways) infringed the ’342 patent was a question of structural equivalence: Was correcting data errors IBM’s way the structural equivalent of using a TI chip and Hamming code to reach the same result. This particular issue of equivalence is not foreclosed by Festo because, even after Festo, the structural element of a means-plus-function limitation may be satisfied by either an identical or an equivalent structure.

However, after the Marlcman decision in this ease, there can be no question that literal infringement of the ’342 (as opposed to infringement by equivalents) would require that the allegedly infringing product employ a single error correction code to perform both the detecting and correcting functions. TM, of course, does not contend that IBM uses a Hamming code to detect and correct errors. Rather, TM contends that several combinations of code that are employed in various IBM products — (1) on-disk error correction codes plus parity, or (2) on-disk codes plus longitudinal redundancy codes plus parity, or (3) longitudinal redundancy codes plus parity — are in reality a single, unitary error correction code. The question then becomes whether there is a disputed issue of material fact about whether each of these combinations constitute an (singular) error correction code. If there is a genuine issue of fact concerning that question, it must be resolved by a jury. To whatever extent there is no issue of fact (as opposed to the parties’ divergent beliefs) on that score, then there is nothing to give to the jury on the question of literal infringement.

Unfortunately, answering this question (as has been true of most questions that have arisen in this lawsuit) is complicated by the fact that the term “error correction code” appears elsewhere in the claims in suit, specifically in limitations that were not the subject of narrowing amendments and that therefore are not subject to the prohibition on equivalents dictated by Festo. ACLARA Biosciences, Inc. v. Caliper Techs. Corp., 125 F.Supp.2d 391, (N.D.Cal.2000). For example, in limitation (ii) of Claim 1, the term “error correction code” appears. In the Markman decision I defined that term as a group of mathematically-interrelated bits generated by something called an error correction code circuit, which is a single integrated circuit. 72 F.Supp.2d at 381. Anything other than a group of mathematically-interrelated bits generated by a single integrated circuit is, therefore, not literally the same thing as the “error correction code” described in limitation (ii) of the claim in suit. However, such a “code” could be found to be equivalent to “a group of mathematically related bits generated by a single integrated circuit.”

Unlike limitation (ii), which is not subject to Festo, limitation (vii) cannot be infringed by equivalents. And limitation (vii) uses the term “error correction code.” As I noted in the Markman opinion (albeit with respect to a different TM patent), a term that appears in more than one claim must be interpreted the same way in each claim. See Southwall Techs., Inc., v. Cardinal IG Co., 54 F.3d 1570, 1579 (Fed.Cir. 1995); Vitronics Corp., v. Conceptronic, Inc., 90 F.3d 1576, 1582-83 (Fed.Cir.1996); Fonar Corp. v. Johnson & Johnson, 821 F.2d 627, 632 (Fed.Cir.1987)

Thus, the Court is faced with one of those convoluted questions that bedevil those of us who are not skilled in the art of patent law. I have already ruled that limitation (vii) can only be infringed if the function is literally infringed. The function can be literally infringed only if IBM’s products use an error correction code (singular) — not multiple error correction codes — to perform the generating function. Elsewhere in the claim, in a limitation that was not amended (and that can be infringed by equivalents) the term “error correction code” is claimed and I have defined it. So, can a claim limitation that cannot be infringed by equivalents (because of Festo) be literally infringed by the equivalent of a feature defined in a limitation within the same claim that can be infringed by equivalents (because it is not subject to Festo)? I confess that at present I have no answer to this question. In fact, I can barely articulate it.

Yet articulate it I must, because it has profound implications for this case. If literal infringement of the means for generating claim requires use of an error correction code that reads literally on that term as defined elsewhere in the patent, then at least some of TM’s infringement claims would be foreclosed. No reasonable juror could conclude, for example, that on-disk codes and parity literally infringe the “error correction code” definition given that term by this Court in the Markman phase, because the on-disk codes and the parity bits are not generated by a single integrated circuit. Therefore, within the meaning of the claims of this patent, they would be separate codes, and the rule of Miles Labs., Inc., v. Shandon Inc., 997 F.2d 870 (Fed.Cir.1993) would bar any claim of literal infringement. However, if an equivalent to the literally defined error correction code claimed in limitation (ii) of Claim 1 can be infringing (because limitation (ii) was not amended during prosecution and is not affected by Festo), then a reasonable juror might conclude that a combination of on-disk codes and parity constitute a single, unitary “error correction code.”

Fortunately, I need not make a final decision on this issue prior to the commencement of trial. Even if I answered the question as IBM would wish, I could not grant defendant’s motion for summary judgment in its entirety, because at least one IBM product (SHARK), and perhaps others, have single integrated circuits (not TI chips, but IBM chips, known as Voyager chips), which generate both the parity bits and error detection apparatus (i.e., a longitudinal redundancy code). (See Pis.’ Exhibits for Hr’g on Mot. for Summ. J. of Non-Infringement in View of Festo at Ex. 5 at Bates No. page 2910327882.) Thus, as to this product, at least, there exists the possibility that the combination of elements that perform the “generating” function of limitation (vii) constitutes a unitary “error correction code,” even within the literal meaning of that term as used in limitation (ii). Since we must go to trial on TM’s contention that the SHARK products infringe, we may as well try the rest of the products as well, while we sort through the metaphysics of this new question. I will entertain additional briefing, addressed only to this novel issue, at an appropriate time.

Conclusion

Despite all the paper, the charts and the exhibits prepared by the parties, there is not very much to try in this case. We are down to one patent from three, and only a few claims are at issue. As to limitation (vii), which is the subject of this opinion, the jury will be asked to determine whether each allegedly infringing IBM product employs a single error correction code to perform the means for generating function of limitation (vii). For each product as to which the answer to that question is “yes,” the jury will be further asked whether this single error correction code falls literally within the definition of that term as articulated by this Court during the Markman phase' — i.e., whether it is a group of mathematically interrelated bits that are generated by a single integrated circuit. This will allow the Court to wrestle with the open question of law, reach some conclusion, and then apply that conclusion on a product by product basis, depending on the jury’s partial findings.

This constitutes the decision and order of the Court. 
      
      . This decision has been edited for publication.
     
      
      . I am not the first Federal judge to have so construed this limitation. Chief Judge William G. Young gave it the identical construction in TM Patents, LLP v. EMC Corp., Civil Action No. 98-10206 (D.Mass. Jan. 27, 1999). The EMC case was settled following the Mark-man hearing but before a verdict was reached at the ensuing trial.
     
      
      . Item (iii) also occasioned a candid, and entirely welcome, acknowledgment from the Federal Circuit that it has developed two inconsistent, if not diametrically opposed, lines of authority on the scope of prosecution history estoppel over the last 16 years — the so-called "flexible bar” approach of Hughes Aircraft Co. v. United States, 717 F.2d 1351, 219 USPQ 473 (Fed.Cir.1983), and the virtually inflexible rule of Kinzenbaw v. Deere & Co., 741 F.2d 383, 222 USPQ 929 (Fed.Cir.1984). The rule adopted by a majority of the Federal Circuit in Festo, which is absolutely inflexible, is, if anything, stricter than the rule of Kinzen-baw.
      
     
      
      . The "all elements” rule holds that every element of the patent must be found in the allegedly infringing product for the doctrine of equivalents to apply. See Warner-Jenkinson Co. v. Hilton Davis Chem. Co., 520 U.S. at 29, 40, 117 S.Ct. 1040, 137 L.Ed.2d 146.
     
      
      . IBM does not contend that this change narrowed the claim. See transcript of January 10, 2001 Oral Argument (at 14).
     
      
      . The pertinent definition of the verb "amend” is, "to change or modify for the better: improve.” Merriam-Webster’s New Collegiate Dictionary, 1977 ed.
     
      
      . This treatise has been relied on by the Federal Circuit. See, e.g., Molins PLC v. Quigg, 837 F.2d 1064, 1065 (Fed.Cir.1988); Woodland Trust v. Flowertree Nursery, Inc., 148 F.3d 1368, 1371 (Fed.Cir.1998); Hyatt v. Boone, 146 F.3d 1348, 1351 (Fed.Cir.1998), cert. denied, 525 U.S. 1141, 119 S.Ct. 1032, 143 L.Ed.2d 41 (1999); Panduit Corp. v. Dennison Mfg. Co., 810 F.2d 1561, 1567 n. 6 (Fed.Cir.1987).
     
      
      . IBM also argues that independent confirmation of the narrowing of these claims can be found in the prosecution history of the '342 patent which, for example, shows the "generating” claim element was changed in order to overcome rejection based on a patent (Dut-ton) that disclosed multiple unrelated mechanisms and codes working together to correct errors in information.
      During prosecution of the '342 patent, the Patent Office rejected the claims under 35 U.S.C, § 103 in view of the Dutton and Fosati patents. (Abate Aff. at Exh. 9 at 3.) In rejecting the original claims, the Patent Office expressly stated that Dutton disclosed the "means for generating” element of the original claims:
      
        Dutton discloses a multi-unit memory system which includes an error correction code generation circuit (12), a plurality of read/write memory units (figure 1), a least a space [sic, spare] memory unit (alternate memory array), means for generating corrected data (12 & 22) and means for accessing the spare memory to write the corrected data in the space [sic] memory. (Id. at 3.) (emphasis added).
      In response to that rejection, the applicants amended the claims "extensively.” Id. at 8. Applicants submitted remarks with the amendment arguing that Dutton disclosed multiple mechanisms including "error correction circuitry,” a processor executing a program and a "group code” that work together to correct errors. (Id. at 10-11.) In addition, applicants made the following argument about the lack of relationship between codes: "There is no suggestion of any relation between any of the group codes stored in Dut-ton's alternative memory (Id. at 12.) (emphasis added)
      In view of the Court’s holding that rests on the literal language of the amendment, I do not need to consider this alternative argument. I note, however, that it does tend to confirm the ultimate conclusion reached in the text of this opinion.
     
      
      . A party is entitled to summary judgment when there is no "genuine issue of material fact” and the undisputed facts warrant judgment for the moving party as a matter of law. Fed.R.Civ.P. 56(c), Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 106 S.Ct. 2505, 91 L.Ed.2d 202 (1986). In addressing a motion for summary judgment, “the court must view the evidence in the light most favorable to the party against whom summary judgment is sought and must draw all reasonable inferences in [its] favor.” Matsushita Elec. Indus. Co. Ltd. v. Zenith Radio Corp., 475 U.S. 574, 587, 106 S.Ct. 1348, 89 L.Ed.2d 538 (1986). Whether any disputed issue of fact exists is for the Court to determine. Balderman v. United States Veterans Admin., 870 F.2d 57, 60 (2d Cir.1989). The moving party has the initial burden or demonstrating the absence of a disputed issue of material fact. Celotex v. Catrett, 477 U.S. 317, 323, 106 S.Ct. 2548, 91 L.Ed.2d 265 (1986), once such a showing has been made, the non-moving party must present "specific facts showing that there is a genuine issue for trial. Fed. R. civ. P. 56(e). The party opposing summary judgment may not rely on conclusory allegations or unsubstantiated speculation.” Scotto v. Almenas, 143 F.3d 105, 114 (2d Cir.1998). Moreover, not every disputed factual issue is material in light of the substantive law that governs the case. “Only disputes over facts that might affect the outcome of the suit under the governing law will properly preclude summary judgment." Anderson, supra., 477 U.S. at 248, 106 S.Ct. 2505.
     
      
      . As to so-called on-disk codes, which are described below, this is something of an overstatement. At a very elementary level (i.e., where there are very few errors), an on-disk code is capable of both detecting an error and correcting it, and then sending it on to its destination with no one the wiser (and without sending the correction to a corresponding back-up disk, as required by limitation (viii), the "means for accessing” limitation). However, TM does not contend that this facet of IBM's products infringes the '342 patent, as it is apparently an old and well-known property of on-disk codes. See, e.g., Ganger EBT at 163-64. The genius of TM’s invention is the use of a single, unitary code that both detects and corrects errors of considerably greater magnitude. And the inventor adopted the structure he chose for his preferred embodiment — the TI chip using the Hamming code— rather than a structure similar to the one employed by IBM because he did not trust the on-disk error correction code to catch all the bad data. (See Potter EBT at 223.)("The other reason we decided against simple parity was that parity would not tell us what was wrong. It would simply tell us something was wrong. We did not have enough confidence in the reliability of the disk’s ability to catch bad data.”)
     
      
      . Festo's patent did not involve a means-plus-function claim, but the majority opinion in Festo clearly indicated that the long-standing law concerning structural equivalence in a Section 112(6) situation was not affected by the decision. See Festo, 234 F.3d at 589.
     
      
      . On-disk correction codes are codes that are generated from material that is literally manufactured into a commercially available disk drive. The codes exist for the purpose of detecting errors on the disk from which they are generated and where they reside. They are capable of correcting a small number of errors, but as the number grows, they do nothing more than tell the computer system that there is an error in a particular sector of data. TM does not claim that the limited "correct” function performed by on-disk codes makes those codes, standing alone, the equivalent of an error correction code that both detects and corrects data, and there seems to be no dispute that this technology has been around for many years. In response to a written question from the Court, IBM asserts that codes known as Reed-Solomon Codes and Cyclic Redundancy Codes (CRC) are forms of on-disk codes.
      Longitudinal Redundancy Codes are codes that can detect the presence of errors but cannot make any corrections. As I understand it, LRC's are not generated from material that is stored on the disk drive during manufacturing and, at least in IBM’s Shark product, they are generated out of the same circuit — the Voyager chip — that generates the parity.
     
      
      . For a list of contentions concerning the component combinations that are alleged to infringe the patent, see Letter from Stephen B. Judlowe, Esq., to the Court, dated January 11, 2001.
     
      
      . Counsel for TM admitted during the January 12, 2000, conference call that the different components of what TM claims is a single error correction code in IBM's products are generated by "multiple circuits,” and that therefore we would be dealing with a question of structural equivalence. (See Tr. of Jan. 12 Hearing at 18.)
     
      
      . TM cannot evade or avoid the Markman ruling. One skilled in the art might well define the term "error correction code” more broadly, but for purposes of this lawsuit the only definition that matters is the Court's.
     
      
      
        . An integrated circuit is defined as "an interconnected array of active and passive elements integrated with a single semiconductor substrate or deposited on the substrate by a continuous series of compatible processes, and capable of performing at least one complete electronic circuit function." Markman Opinion, 72 F.Supp.2d at 381.
     