
    INTEL CORPORATION, a Delaware corporation, Plaintiff, v. VIA TECHNOLOGIES, INC., a Taiwan corporation, and VIA Technologies, Inc., a California corporation, Defendants.
    No. C 99-03062 WHA.
    United States District Court, N.D. California.
    Nov. 20, 2001.
    See also, 2001 WL 777085.
    
      Henry A. Petri, Jr., John F. Lynch, Arnold White & Durkee, Houston, TX, Joseph Kattan, Gibson Dunn & Crutcher, Washington, DC, James F. Valentine, Howrey Simon Arnold & White, LLP, Menlo Park, CA, Marc G. Schildkraut, Howrey Simon Arnold & White LLP, Washington, DC, for Plaintiff.
    Robert P. Feldman, Leo Cunningham, Wilson Sonsini Goodrich & Rosati, John S. Ferrell, John S. Ferrell, Carr & Ferrell LLP, Palo Alto, CA, Laura Lee Engura-soff, Howery Simon Arnold & White, LLP, Menlo Park, CA, Michael S. Dowler, How-ery Simon Arnold & White, LLP, Houston, TX, for Defendants.
   ORDER GRANTING DEFENDANT’S MOTION FOR SUMMARY JUDGMENT ON EXPRESS LICENSE DEFENSE FOR UNITED STATES PATENT NO. 6,006,291; DENYING PLAINTIFF’S CROSS-MOTION FOR SUMMARY JUDGMENT

ALSUP, District Judge.

INTRODUCTION

This case features an industry-wide standard for certain computer-chip specifications and the scope of a royalty-free cross-license covering the standard. Such standards promote progress. Without them, the industry would balkanize, improvements would slow, and consumers would suffer. A key issue, however, concerns patent rights. On the one hand, by definition, standards must be available and unencumbered for industry-wide use. On the other, property rights, an important incentive to innovate, need protection. This tension pervades the present motion in this hard-fought litigation between two chip manufacturers.

For the reasons given below, this order holds that VIA Technologies, Inc., is licensed to practice certain patent claims owned by Intel Corporation that are required to implement an industry-wide standard promoting so-called “Fast Write,” a standard promulgated by Intel itself. The claims at issue are namely Claims 1, 4, 6, and 7 of United States Patent No. 6,006,291. VIA’s motion for summary judgment is GRANTED. Intel’s cross-motion for summary judgment is DENIED.

STATEMENT

The controversy concerns a signal protocol known as Fast Write. By way of background, the components of a computer system include separate chips mounted on a circuit board known as the motherboard. The system memory, microprocessor, chip-set, and various input/output devices, such as modems, are all distinct components. In order to communicate with each other, each component chip must send its signals through the chipset, which acts as a translator between components. Both parties herein manufacture and sell chipsets.

The patent at issue in this motion, United States Patent No. 6,006,291, is entitled “High-Throughput Interface Between a System Memory Controller and a Peripheral Device.” As discussed in greater detail in the claim construction order dated June 29, 2001, the ’291 patent is directed to the discourse between a chipset and a graphics chip — specifically, the Fash-Write protocol. VIA concedes that some of its products practice Fast Write, ie., Claims 1, 4, 6, and 7 of the ’291 patent (VIA Exh. 50, at 2-3). It contends, however, that it does not infringe the ’291 patent, invoking the defense of license. Intel argues that Fast Write is outside the scope of the royalty-free cross-license it granted to VIA and all other members of the computer industry signing on to its terms. Presented now is a question of interpretation of the industry-wide license.

Except as otherwise noted, the following facts are not in dispute. At all relevant times, in the computer industry, IHVs (independent hardware vendors) fabricated the components of computer systems, such as graphic cards and chipsets, and OEMs (original equipment manufacturers) assembled the components and sold the finished product. Achieving component inter-operability was desirable. Doing so was difficult, however, because of the web of intellectual-property rights that could be implicated. One way that the industry dealt with this problem was through the formulation of industry standards. Standards were often promulgated by a special interest group (SIG) comprised of the interested parties pooling their experience and knowhow. Once a standard was agreed upon, the SIG published a specification explaining how to implement the technology and a license for those who wished to sign on.

Various licensing schemes were used. For example, PCI (peripheral component interconnect) was an industry standard relating to a bus (a set of lines carrying signals) connecting the chipset and peripheral devices. The first revision of the PCI Specification was available to anyone who signed a reciprocal royalty-free cross-license. In a more-recent standard called 1394, an external bus used for digital video, anyone implementing the specification was required to pay a royalty, which was divided among the members of a patent pool comprised of companies that had contributed intellectual property to the specification (Fair Dep. 16-17, 21).

Intel, the leading producer of microprocessors and chipsets, has been an important, if not the most important, leader in the development of industry standards. Intel has benefitted in its sale of chips by making computers themselves less expensive and better performing. In order to increase performance of PC’s in general, Intel devoted considerable research and marketing efforts to supporting the PC platform, i.e., making sure that the components of a personal computer, other than the microprocessor and chipset, kept apace with the technological developments of the products Intel produced. This principle was internally known at Intel as the “balanced system” (e.g., Rash Dep. 32). The idea was that better overall performance of the PC would expand the market and increase sales.

1. AGP.

AGP (accelerated graphics port) was an industry standard developed by Intel. The development of AGP was spurred by the growing popularity of three-dimensional graphics applications, which required large amounts of memory and high-speed processing. Before AGP, graphics chips, shared a common bus to the core logic with all the other peripheral devices. This inhibited the three-dimensional graphics capabilities of personal computers. Intel perceived that this was a “bottleneck” to the performance of the “balanced system” (Aymar Dep. 30). As a result, Intel’s engineers began designing a direct interface between the chipset and graphics devices known as the graphics-attach port (“GAP”). The name was eventually changed to AGP. No special interest group for AGP was formed. Instead, Intel controlled the entire endeavor.

In December 1995, Intel finished the first revision of what became the AGP 1.0 Specification (VIA Exh. 7). The final AGP 1.0 Specification was released in July 1996. AGP 1.0 offered significant improvements over the prior art. Not only did it call for a port dedicated to data transfers between the core logic and a graphics chip, but it established a new protocol for data transfers, performed at the initiative of a graphics chip. Unlike PCI, AGP allowed a graphics chip to send or receive blocks of data in bursts. Furthermore, it contained a feature known as 2x in which data could be transferred on the rising and trailing edge of every clock signal, effectively doubling transfer speed. AGP 1.0 is not immediately at issue herein, but it illuminates the history of the license at issue.

Before releasing the AGP 1.0 Specification, Intel began promoting AGP at trade shows and in the press. Intel admits that its representatives touted AGP as “an ‘open specification,’ and [stated] that it would be accompanied by a reciprocal royalty-free license. In some statements, Intel representatives likened the [specification's openness to two existing specifications, the PCI Specification and the Universal Serial Bus (“USB”) Specification” (Opp.5).

The AGP 1.0 Specification and a license agreement entitled “Accelerated Graphics Port Interface Specification Agreement” could be downloaded from Intel’s website. The agreement was binding once the party executing it signed and submitted it to Intel. The terms of this agreement were almost identical to the later-signed one at issue. VIA signed the AGP 1.0 agreement in December 1996 and began making chip-sets that were compatible with graphics chips using AGP.

Intel continued to promote AGP after releasing the AGP 1.0 Specification. It published design guides providing technical information that helped implement AGP (Crepps Dep. 59). It provided technical support to industry members trying to implement the technology (id. at 46). It also sponsored “plug-fests,” which were events where industry members could test their products to determine whether the products were AGP compatible (id. at 39).

Meanwhile, Intel was developing two improvements to the AGP 1.0 Specification. The first was known as 4x, which doubled the speed of 2x transfers by using clock strobes. The second was Fast Write. The latter enabled the chipset to instigate high-speed data transfers to the graphics chip. AGP 1.0 only allowed the graphics chip to initiate such transfers. With Fast Write, a chipset could blast data across the AGP interface on its own initiative. In December 1997, Intel privately filed a patent application on Fast Write. In May 1998, Intel publicly released the AGP 2.0 Specification, which taught how to implement 4x and Fast Write. Before releasing the AGP 2.0 Specification, the Intel attorney who drafted both AGP licenses, Joseph Bond, reviewed and edited the specification (Bond Dep. 65). When the AGP 2.0 Specification was released, Intel posted another license form on its website, the subject of this dispute.

Like AGP 1.0, Intel promoted AGP 2.0 before and after its release and continued to provide technical support and to hold plug-fests (Fair Dep. 67-71). At a trade show, for instance, one of the co-inventors of Fast Write, presented a slide show primarily directed to Fast Write and encouraged attendees to implement AGP 2.0 (VIA Exh. 35).

After the release of the AGP 2.0 Specification, VIA began making chipsets that supported 4x and Fast Write. The ’291 patent issued on December 21, 1999. VIA downloaded the AGP 2.0 license and signed it on March 8, 2000, which, according to Intel, was two months after it released its first infringing chipset. This was the specific license at issue herein. VIA never sought advice from counsel regarding the scope of either AGP license before July 2000, when Intel amended its complaint to add the ’291 patent to this lawsuit.

2. The License.

The license at issue is entitled “Accelerated Graphics Port Interface Specifications Agreement.” In part, it reads (italics indicates disputed portions; box and boldface in original):

This is a royalty-free, reciprocal patent license for Adopters of the Accelerated Graphics Port (“AGP”) Interface Specifications who wish to make use of the AGP Interfaces designed by Intel, and Odescribed in the AGP Interface Specifications, in their AGP-compliant products. When Adopter’s authorized representative signs this Agreement and delivers it to Intel at the address below, this Agreement will be legally binding and will extend to all Fellow Adopters.

1. Definitions: As used in this Agreement.

• “Adopter” is the party identified at the end of this Agreement.

• “Fellow Adopters” are Intel Corporation (“Intel”) and any other entity which executes or has executed and delivered to Intel Corporation a substantially identical counterpart of this Agreement, including any entity which directly or indirectly controls, is controlled by, or is under common control with a Fellow Adopter, so long as such control exists.

• The “Accelerated Graphics Port Interface Specifications” are the specifications described in the documents entitled Accelerated Graphics Port Interface Specifications, Revisions 1.0 and 2.0, published by Intel.

• The “AGP Interfaces” are the electrical interfaces and bus control protocols disclosed in, and required by, the Accelerated Graphics Port Interface Specifications.

• “Interface Claims” means claims of a patent or patent application, which are owned or controlled by a party, that must be infringed in order to comply with the AGP Interfaces. “Interface Claims” does not include claims related to manufacturing technology, claims not required to be infringed in complying with the AGP Interfaces (even if in the same patent as Interface Claims), or claims which, if licensed, would require a payment of royalties to unaffiliated third parties.

2. Reciprocal License

• Each Fellow Adopter grants to each other Fellow Adopter a nonexclusive, royalty-free, nontransferable, non-sublieenseable, worldwide license under its Interface Claims to make, have made, use, import, offer to sell and sell products which comply with the AGP Interfaces, provided that such license shall not extend to features of a product which are not required to comply with the AGP Interfaces or to which there was a feasible alternative to infringing a given claim....

3. General Legal Points

Governing Law. This Agreement shall be construed and controlled by the laws of Delaware....

Complete Agreement, No Other Licenses. This Agreement sets forth the Parties’ entire agreement regarding its subject matter. Except for the rights expressly provided by this Agreement, neither Party grants or receives, by implication, or estoppel, or otherwise, any rights under any patents or other intellectual property rights. No modifications or additions to or deletions from this Agreement shall be binding unless accepted in writing by an authorized representative of both Parties.

;¡í # ❖ s¡: # ❖

In June 1999, Intel commenced an action against VIA, accusing some of its chipsets of infringing four patents. The ’291 patent issued to Intel in December 1999, as noted. On July 6, 2000, Intel deleted the original four patents from this action and asserted four different patents, including the ’291 patent. As stated, VIA concedes that some of its products practice Fast Write and Claims 1, 4, 6, and 7 of the ’291 patent.

ANAJLYSIS

The parties agree that this contract is governed by Delaware law, under which contract interpretation is a matter of law. Rhone-Poulenc Basic Chems. Co. v. American Motorists Ins. Co., 616 A.2d 1192, 1195 (Del.1992). “Contract terms themselves will be controlling when they establish the parties’ common meaning so that a reasonable person in the position of either party would have no expectations inconsistent with the contract language.” Eagle Indus., Inc. v. DeVilbiss Health Care, Inc., 702 A.2d 1228, 1232 (Del.1997). Courts resort to extrinsic evidence to resolve ambiguities in negotiated contracts, and construe ambiguities in unilateral contracts in which one party controlled all the terms against the drafter. SI Mgmt., L.P. v. Wininger, 707 A.2d 37, 43-44 (Del.1998). A contract, however, “is not rendered ambiguous simply because the parties do not agree upon its proper construction.”Rhone-Poulenc, 616 A.2d at 1196.

1. The License.

Interpreting the license involves a cross-referencing chain of definitions. The section entitled “Reciprocal License” sets forth what is licensed. Only “Interface Claims” are licensed. An “Interface Claim” is a patent claim that “must be infringed in order to comply with the AGP Interfaces.” In turn, the “AGP Interfaces” are defined as “the electrical interfaces and bus control protocols disclosed in, and required by the Accelerated Graphics Port Interface Specifications.” In further turn, the “Accelerated Graphics Port Interface Specifications” are defined as “the specifications described in the documents entitled Accelerated Graphics Port Interface Specification, Revisions 1.0 and 2.0 published by Intel.” Although the main axis of contention herein concerns the word “required,” it is useful to appreciate the overall interpretations advanced by the parties, now described.

A. Intel’s Reading.

According to Intel, the purpose of the license is to give members of the industry the right to — but only to — the “baseline” features of AGP. Licensees, Intel asserts, can then design on top of this baseline, retaining the intellectual-property rights to their innovations. Intel would restrict the term “required” to mean the baseline features of AGP. Protocols and electrical interfaces that are not necessary to perform the baseline functions of AGP are not “required” and therefore unlicensed. Fast Write is not a “required” protocol, Intel concludes, because it was an advancement over the baseline. In its “baseline” argument, Intel invokes a supposed distinction between what is “required” under the specification and what is “optional.” The license does not use the words “baseline” or “optional.”

B. VIA’s Reading.

According to VIA, the license grants the right to use all technology necessary for any specification in the AGP 2.0 Specification regardless of whether it is an optional feature (rather than an essential feature). Any chipmaker who implements Fast Write must do so in the exact way specified or its chips will not be compatible with chips of other manufacturers using the standard. Exact compliance with AGP 2.0 is essential if the Fast Write option is to be included. In this sense, the specification is “required.” AGP 2.0 sometimes describes aspects of the two chips on each end of the AGP bus. Although they are described in the AGP 2.0 Specification, these aspects are not “required” to make Fast Write work.

2. The Plain Meaning.

In brief, this order holds that the license covers all specifications in the AGP 2.0 Specification, including the specification for Fast Write, even though the feature supported by the specification is described as an option rather than, as Intel would label it, a so-called baseline function. Accordingly, this order finds that VIA is licensed to practice the claims at issue. Moreover, even if there were an ambiguity in the license, such ambiguity must be resolved against Intel, the drafter of the license, given that solely Intel drafted the license and offered it on a take-it-or-leave-it basis, i.e., it was not the product of bilateral negotiations. Finally, the extrinsic evidence in the record, with all disputed facts construed in the light most favorable to Intel, would not support a contrary reading.

A. The Box.

Preliminarily, this order rejects VIA’s box argument. VIA argues that the graphical box at the top of the license (reproduced above) carries the day. The box states that the license is a “royalty-free reciprocal patent license” for those “who wish to make use of the AGP Interfaces designed by Intel, and described in the AGP Interface Specifications, in their AGP-compliant products.” In other words, the box indicates that the AGP Interfaces “described in” the AGP 1.0 and 2.0 Specifications are licensed. Intel argues that this headline-quality description is explained by the detail following.

Of course, Intel is correct. No reasonable person reading the license would limit his or her gaze to the box. It is essential to read the license, together with the specifications referenced therein, in their entirety. VIA’s box-top argument is rejected.

B. “Accelerated Graphics Port Interface Specifications.”

Before turning to the meaning of “required,” it is important to decide the meaning of “Accelerated Graphics Port Interface Specifications.” The license defines this as “the specifications described in the documents entitled Accelerated Graphics Port Interface Specification, Revisions 1.0 and 2.0 published by Intel.” This term is significant because subject to the other terms, the license extends to “the electrical interfaces and bus control protocols disclosed in, and required by” the “Accelerated Graphics Port Interface Specifications.” The latter phrase now needs construction.

In VIA’s view, the term “specifications described in” means the specific ways to construct the various features described in the AGP 1.0 and 2.0 Specifications. Because Fast Write is a specification “described in” the AGP 2.0 Specification, VIA contends, the license extends to the electrical interfaces and bus-control protocols required by AGP 2.0 Specification for Fast Write. In Intel’s view, the “specifications described in” the AGP 1.0 and 2.0 Specifications, simply refers to the generic AGP 1.0 and 2.0 Specifications as a whole but not to any specific contents within the booklets.

Intel is incorrect. The term “specifications” clearly refers to the descriptions and directions of how to implement the enumerated features detailed in the AGP 2.0 Specification. For instance, the AGP 2.0 Specification has a number of section headings with titles such as “Signals and Protocol Specification” and “Electrical Specification.” Following each heading is a detailed direction how to implement the features described within. Under Signals and Protocol Specification, there are a number of sub-headings such as “Pin Description,” “Bus Commands,” and “Fast Write Transfers.” The pages that fall within the sub-heading Fast Write Transfers (pages 85-120) contain diagrams and descriptions of the Fast Write protocol that are identical to the ones in the specification of the ’291 patent.

The AGP 2.0 Specification clearly contains a number of specifications including, most importantly, a specification of how to implement Fast Write. VIA’s reading is the only reasonable way to interpret the meaning of the term “the specifications described in the documents entitled Accelerated Graphics Port Interface Specification, Revisions 1.0 and 2.0 published by Intel.” Otherwise, the words “described in” are sapped of meaning. The “specifications described in,” therefore, must refer to the ways to construct the features described in the AGP 1.0 and 2.0 Specifications.

Alternatively, Intel argues that Fast Write is a “protocol,” not a specification (Opp.17). A protocol, however, can also be a specification. At oral argument, Intel’s attorney at first even agreed that the AGP 2.0 Specification contained a “specification” for Fast Write. At the end of oral argument, however, he rescinded his agreement. Although the Court would not bind counsel to his admission, the exchange illustrates the confusion in Intel’s position.

Intel’s tautological reading of this key definition reads the words “described in” out of the license. “The cardinal rule of contract construction is that, where possible, a court should give effect to all contract provisions.” Sonitrol Holding Co. v. Marceau Investissements, 607 A.2d 1177, 1184 (Del.1992). Intel notes -that the AGP 1.0 license only used the singular term “specification.” It argues that the term “specifications” was merely pluralized because the AGP 2.0 license extended to both the AGP 1.0 and 2.0 Specifications. Its rationalization fails to explain why the license would even define the term “Accelerated Graphics Port Interface Specifications” at all, much less use the phrase “specification(s) described in.”

C. Fast Write Is “Required.”

As stated, the heart of this case is what the term “required” includes or excludes. The license excludes “features of a product which are not required to comply with the AGP Interfaces” and includes “electrical interfaces and bus control protocols disclosed in, and required by” the specifications described in the AGP 1.0 and 2.0 Specifications.

Table 3-11, shown below appears on page 41 of the AGP 2.0 Specification.

As shown by the arrow, where the far-right column labeled “corelogic, FW master” and the row for the signal WBF# intersect, there is an “R,” which the legend indicates means that this signal is “required.” As stated in the ’291 patent and the AGP 2.0 Specification, WBF# was the new signal required for the Fast Write protocol: “One additional signal is needed when using the FW protocol — Write Buffer Fuü (WBF#)” (Col. 7:30-31; AGP 2.0 Specification at 86). It is not used in any other protocol. The signal WBF# is covered by Claim 1 of the ’291 patent (Final Claim Construction Order dated June 29, 2001, at 11). Intel concedes that the electrical characteristics of WBF# are an electrical interface (Intel Br. 14). As can be seen from Table 3-11, WBF# is required by the specification for Fast Write. At first blush, this might seem to end the license inquiry in VIA’s favor.

Intel, however, points to other parts of the AGP 2.0 Specification. On page 39 of the AGP 2.0 Specification, Table 3-9 provides a “Summary of Interfaces Based on Function and Agent.” The table shows what functions each chip is required to support, with “O” meaning optional and “R” meaning required. For instance, the “R” under “PCI target” signifies that the graphics chip is required to have PCI-target functionality, ie., the graphics chip must be able to receive PCI signals.

Table 3-9

Device Graphics Corelogic

Interface_PCI_AGP_PCI_AGP

Agent Target Master Master FWTarget Target Master Target FWMaster

ROOO R R R O Support

As can be seen from the table, under Fast Write for both the chipset (corelogic) and the graphics chip, the letter “0” appears, indicating that it is “optional.” Similarly, page 33 of the specification states (AGP 2.0 Specification at 33):

The corelogic may optionally support:
1. Data transfers at 4x or
2. Fast Write (FW) transactions to the AGP master.
The AGP master may optionally choose:
1. How it enqueues requests or
2. The rate at which it transfers data
or
3. If it supports FW transactions.

According to Intel, as seen in Table 3-9, and the language above from page 33, the AGP 2.0 Specification draws a distinction between “optional” and “required.” Since Fast Write is labeled an optional protocol, according to Intel, it is not a protocol “required by” the AGP 2.0 Specification, and is therefore unlicensed.

The issue is thus framed as follows. Intel would limit the license grant to “baseline” features and exclude “optional” features. VIA would extend the grant to all specifications within the AGP 2.0 Specification, whether or not they describe optional features.

3.Reasonableness.

A. VIA’s Interpretation Is Reasonable.

According to VIA, as stated, the license extends to all features specified in the AGP 2.0 Specification for communications between a graphics chip and a chipset, whether the feature is optional or not. The license draws a distinction between the specified protocol, the sequence of signals and their meanings, versus the chips receiving and transmitting the data. The latter chips, although “described in” the specifications are not required by them and are not licensed. The signal protocol, however, which is an exact code, is licensed since it must be implemented in the “required” way or not at all.

This is a plainly reasonable meaning of the word “required” and, as will be shown, the only reasonable meaning. The AGP 2.0 Specification makes clear that even “optional” features, such as Fast Write still have a “required” implementation of exceeding exactitude. Table 3-11, for instance, lists WBF# as “required” for Fast Write. Intel witnesses, moreover, uniformly agreed that “optional” features including Fast Write must be implemented as required by the AGP 2.0 Specification. For instance, Norman Rasmussen, a co-inventor of the ’291 patent and author of the AGP 2.0 Specification, testified as follows (Rasmussen Dep. 127-28):

Q: So if — if a designer wants to implement fast write in an AGP 2.0-compliant part, they would have to do it in accordance with what’s set out in the spec?
A: If they choose to do fast writes, then they have to do it the way it’s been defined.

He further agreed that if a chipset supports Fast Write, WBF# is a “required” signal (id. at 452). Similarly, Robert Crepps, a Technical Marketing Engineer for Intel who was responsible for providing technical support to OEMs and IHV’s trying to implement the AGP Specifications, testified that if Fast Write is implemented, then the signal WBF# is required (Crepps Dep. 123). He explained: “There are capabilities that are not required, but if do you choose to implement them, they bring with them a set of requirements. So ‘required b/ varies, depending on what you’re implementing” (id. at 110) (emphasis added). Other Intel employees likewise noted that the AGP 2.0 Specification contained requirements for optional features. For example, Patrick Gelsinger, General Manager, Desktop Marketing, explained: “If they chose to — for whatever technical or business reason, to implement the optional features, then they would have to do so in compliance %vith the tests — or the spec and consistent with the tests that would be made available. So if you’re doing the optional stuff, you have to do it this ivay, but there is no requirement for you to do so” (Gelsinger Dep. 40) (emphasis added).

B. Intel’s Interpretation Is Unreasonable.

The distinction Intel draws between “optional” and “required” features is unreasonable. Under the AGP 2.0 Specification, WBF#is required — expressly so — in order to implement Fast Write (even if Fast Write is an option). The license does not explicitly exclude “optional” features. It does not even use the words “optional” or “baseline” at all. On the other hand, the license explicitly extends to interfaces “required by” the specifications. Fast Write, as shown above, is a specification.

Under Intel’s reading of the license, it would be impossible for any engineer or business to understand what was (or was not) licensed. While Intel argues that looking at Table 3-9 and page 33 of the AGP 2.0 Specification (reprinted above) is all one must do, it not entirely clear why or how anyone would be prompted to do it. The license does not draw a distinction between “optional” and “required,” not using, as stated, the word “optional” at all. The references cited by Intel deal with “optional” versus “required” in a context that has no clear (or even unclear) tie to the license grant. The probative force of the cited passages, moreover, is completely neutralized by the separate table in the specification stating WBF#is “required.”

The interpretation put forth by Intel, moreover, is self-contradictory. Numerous features in both the AGP 1.0 and 2.0 Specifications are labeled “optional” that Intel now contends are indeed licensed. For instance, page 9 of the AGP 1.0 Specification reads (emphasis added): “Note that there are some optional mechanisms that allow address demultiplexing — using an alternate (non-AD bus) mechanism for transferring address — which is described in section 3.1.3.” Intel has recently admitted in court-ordered interrogatory responses that this refers to a “required” protocol, and is therefore a licensed feature (Intel Response to Amended Interrogatory No. 56 ¶ 1). Similarly, the AGP 2.0 Specification states that “the corelogic may optionally support data transfers at 4x” and that the AGP master (graphics chip) “may optionally choose ... the rate at which it transfers data.” Yet, in its recent interrogatory responses, Intel states that 4x would be licensed for both a chipset and graphics chip if 4x were patented (Intel Response to Amended Interrogatory No. 56 ¶ 6). It is impossible to see how those “optional” features are “required” without the “optional” features at issue also being “required.”

Table 3-9

Device Graphics Corelogic

Interface PCI AGP PCI AGP

Agent Target Master Master FWTarget Tar-get Master Target PWMaster

Support R O O 0 R R R 0

Moreover, under Intel’s reading of the license, nothing would be licensed to graphics chipmakers (IHVs). As Table 3-9 above indicates, the only “required” feature for graphics chips is PCI-target functionality (being able to receive PCI signals). In other words, if the required/optional distinction in this chart is determinative of what is licensed, then the AGP 2.0 license would not allow graphics IHVs to practice AGP at all.

Intel argues that because the chart indicates that AGP-target functionality is “required” for the corelogic, that therefore AGP is a protocol that is “required by” the AGP 2.0 Specification. This reading, however, is arbitrary as it would mean that features labeled as “optional” in Table 3-9, such as AGP-master functionality for graphics chips, are required under the license agreement, and features labeled as “required” in Table 3-11, such as WBF# , are not required under the license agreement.

Finally, Intel argues that its interpretation is consistent with the policies underlying the purpose of the license. According to Intel, a licensing model in which only the baseline features are included is known in the industry and is the intended purpose of the term “required.” Patrick Gelsinger, Intel General Manager, Desktop Products Group, explained that a baseline licensing scheme provides value to customers and encourages innovation because it allows designers to differentiate their products and to claim the intellectual-property rights to their innovations (Gelsinger Dep. 54-56).

The policies argued by Intel’s marketing executives are plausible, but they do not make Intel’s interpretation of the words actually used reasonable. Indeed, with other standards such as PCI (peripheral component interconnnect) and USB (universal serial bus), Intel used a different licensing model in which optional features were concededly licensed (e.g., Bond Dep. 377). There are countervailing policy reasons Intel might have had for licensing more than baseline features. One might well have been the balanced system approach, ie., to cause IHVs and OEMs to adopt an industry standard that promote PCs sales in general and, in turn, promote Intel chip sales.

4. Contra Proferentem.

The foregoing is dispositive. There is, however, another important and independent ground for decision. Intel offered the AGP licenses to the industry on a standardized take-it-or-leave-it basis. It solely drafted both the AGP licenses and the AGP Specifications. It controlled what features are described in the specifications and whether they are listed as “required.” Both the licenses and the specifications could have easily been drafted by Intel with simple language stating that only baseline features were licensed or that all features labeled “optional” were not licensed. Under Delaware law, to the extent there is any ambiguity in the words “specifications” and “required,” those ambiguities must be resolved against Intel.

To be sure, where ambiguities arise, the rule of contra proferentem is not always a dispositive maxim. But where, as here, the ambiguity arises in a contract drafted solely by one side and offered to others on a take-it-or-leave-it basis, then contra prof-erentem has been held to be determinative in Delaware. Recently, in a suit by limited partners against a general partner, the Delaware Supreme Court refused to consider extrinsic evidence to resolve a contractual ambiguity and instead construed the agreement against the general partner, the party that drafted the document. SI Mgmt., L.P. v. Wininger, 707 A.2d 37, 43 (Del.1998). In distinguishing a decision made one year earlier, Eagle Industries, Inc. v. DeVilbiss Health Care, Inc., 702 A.2d 1228 (Del.1997), in which it considered extrinsic evidence to resolve an ambiguous stock-purchase agreement, the court stated:

Here, the setting in which the Limited Partnership came into existence appears on this record to be quite different from that in Eagle. This was not a bilateral negotiated agreement. Rather, it appears that the General Partner solicited and signed on 1,850 investors to the Agreement that those investors had no hand in drafting. Based on that premise, the principle of contra proferentem applies. Accordingly, ambiguous terms in the Agreement should be construed against the General Partner as the entity solely responsible for the articulation of those terms.

SI Mgmt., 707 A.2d at 43. Similarly, in applying Delaware law, the Federal Circuit has held that construing a patent license against the drafter was proper. Studiengesellschaft Kohle, M.B.H. v. Hercules, Inc., 105 F.3d 629, 634 (Fed.Cir.1997).

Intel attempts to distinguish SI Management and Hercules in three ways, none of which is availing. First, Intel argues that under Delaware law, contra proferen-tem is a doctrine of “last resort.” SI Management, however, clearly rejected that proposition. It refused to examine extrinsic evidence instead of applying contra proferentem to an ambiguity in a standardized contract drafted entirely by one party. Indeed, in distinguishing Eagle Industries, it made clear that in such circumstances, courts are not to look at extrinsic evidence. SI Mgmt., 707 A.2d at 43.

The Delaware decisions using the words “last resort” are inapposite. In E.I. du Pont de Nemours and Co., Inc. v. Shell Oil Co., 498 A.2d 1108, 1114 (Del.1985), the main authority relied upon by Intel, the Delaware Supreme Court rejected applying contra proferentem when it could construe the plain language of the contract. It stated that “the rule of contra proferen-tem is one of last resort, such that a court will not apply it if a problem in construction can be resolved by applying more favored rules of construction.” In context, that statement simply meant that contra proferentem was not a substitute for analyzing the language of a contract.

Second, Intel argues that Delaware courts “take a more conservative view than the Restatement of Contracts.” This argument is flatly refuted by Kaiser Aluminum. 681 A.2d at 398 (“It is a well-accepted principle that ambiguities in a contract should be construed against the drafter. Restatement (Second) of Contracts § 206”).

Third, Intel maintains that under Delaware law, contra proferentem only applies in three situations: (i) suits by limited partners against general partners; (ii) suits against insurers; and (in) suits by stockholders against corporations. The caselaw, however, makes no such distinction. Rather, the distinction made has been whether both sides had input into drafting the agreement. For instance, in SI Management, contra proferentem applied to a “take it or leave it” contract where the terms were “entirely within the control of one party.” 707 A.2d at 44 (emphasis in original). In contrast, in Shell Oil, the court stated: “The justification for applying such rule pales in a situation, like the instant one, where the terms of an agreement resulted from a series of negotiations between experienced drafters.” 498 A.2d at 1114. Intel also argues that because VIA is a sophisticated party, contra proferentem should not apply. The sophistication of a party, however, was not the basis of the decision in SI Management . A limited partner, an investor, or a shareholder can be highly sophisticated. The key point here is that like the limited partners in SI Management, VIA (and the rest of the industry) had no hand in drafting the AGP 2.0 license and no choice as to what its terms were. In sum, an independent ground for decision is the rule of contra proferentem.

5. Extrinsic Evidence.

It is unnecessary, in light of the foregoing, to try to resolve any ambiguities by reference to extrinsic evidence. Since both sides have made much of the extrinsic evidence, however, this order further holds that the extrinsic evidence would compel the same result at all events.

Considering all the undisputed extrinsic evidence and taking the disputed facts in the light most favorable to Intel, the summary-judgment record still does not raise a question of fact contrary to the foregoing construction. In brief, Intel argues that licenses used for other industry standards, such as DVI (digital visual interface), demonstrate that its position is reasonable. It also argues that a standard known as ACR (advanced communications riser), which VIA promoted, employed a baseline-licensing scheme. It also contends that the way VIA marketed its chipsets and testimony by Intel executives support its view of the license. Taking all this evidence at face value, however, it does little to support Intel’s position. Moreover, other undisputed extrinsic evidence in the record tends to undermine Intel’s reading of the license. These points are now considered in turn.

A. Other Licensing.

As stated, different models of cross-licensing have been used for various industry standards. Overall, the evidence in the record does not establish that any model was an industry custom. The licenses and standards discussed below, with one exception, all used different language than the AGP licenses. Their meaning is tangential.

(1) ACR and DVI.

VIA was one of the promoters of the ACR Specification. The license accompanying the ACR Specification only licensed “Necessary Claims,” which were defined to include patent claims “which are necessarily infringed by an implementation of a version of the Specification adopted by the Promoters, where such infringement could not have been avoided by another commercially reasonable noninfringing implementation of such Specification” (Intel Exh. 64 ¶ 1.6). Intel argues that this shows that VIA was aware of baseline-licensing schemes similar to the one Intel claims was contained in the AGP 2.0 license. Even if only the baseline features of the ACR Specification were licensed, this evidence at most shows that VIA was aware that baseline-licensing schemes existed. That a baseline-licensing model existed, that such licensing can be desirable, or that VIA was aware that such licensing existed, has little bearing on the meaning of the license at issue.

Moreover, the comparison between the ACR license and the AGP license is inap-posite. A superficial reading shows that the ACR license was structured entirely differently than the AGP 2.0 license. Notably, the license did “not extend to features of a' product which are not required to comply with the Specification or to other specifications (id. ¶ 2.1.2) (emphasis added). “Specification” was defined as certain specifications within the ACR Specification, once finalized (id. ¶ 1.9). As a term of the license grant, an implementation had to be “Fully Compliant” with the Specification (id. ¶ 2.1.2). In turn, “Fully Compliant” was defined to include “an implementation of the Specification which supports or implements all portions of the Specification (id. ¶ 1.5) (emphasis added). It is unnecessary to interpret the three-page ACR license to see that on its face, it fails to illuminate the meaning of the AGP 2.0 license.

Similarly, Intel notes that the DVI license explicitly licensed “the electrical interfaces, mechanical interfaces, signals, signaling and coding protocols, and bus control protocols, disclosed in, and required by, the Licensed Specification, including described options for such interfaces in the Licensed Specification” (Intel Exh. 41, ¶ 7) (emphasis added). According to Mr. Bond, the drafter of the AGP license who also participated in the drafting of the DVI license, the italicized language was added at the insistence of a promoter who “wanted the optional features to be licensed” (Bond Dep. 311). One promoter’s understanding of a license using different language than the AGP 2.0 license, and having a different specification which is not in the record, is hardly probative of the meaning of the AGP 2.0 license. Moreover, the DVI license devoted a large paragraph to the definition of “necessary claims,” the only claims that were licensed. Given the difference in the language, it is impossible to draw any reasonable analogy to the AGP licenses and specifications.

(2) PCI, USB, and LPC.

VIA, on the other hand, points to licensing for other prevalent industry standards: the PCI (peripheral component interconnect), USB (universal serial bus), and LPC (low pin count) specifications and licenses. The first revisions of the PCI and USB specifications were standards largely established by Intel in which optional features were licensed. The LPC Specification was also developed and licensed by Intel. According to VIA, these licenses show that Intel licensed other specifications similarly to this order’s reading of the AGP 2.0 license.

In relevant part, the PCI license agreement stated that it licensed patent claims that “relate to bus technology and are necessarily required to implement any implementation compliant with PCI Local Bus Specification or Future Revisions” (VIA Exh. 64, at 2) (emphasis added). The USB license only extended to claims “necessarily infringed by implementing those portions of the final specification with the Scope,” and the Scope did not extend to “any portions of a product and any combinations thereof the purpose or function of which is not required for compliance with the Final Specifications ” (VIA Exh. 67) (emphasis added). The LPC license was identical to the AGP 2.0 license, except that it was directed to LPC rather than AGP (VIA Exh. 59). VIA contends that the LPC license must extend to optional features because all the cycle types described in the specification were listed as “optional” (VIA Exh. 60, at 5).

With the possible exception of LPC, the Court finds none of this evidence probative. These five specifications and.licenses, with the exception of LPC, all used different language than the license at issue. While Intel has proffered evidence that baseline-licensing schemes existed, most of the evidence regarding other licensing schemes suggests that the term “required” was not used to exclude large portions of the specification in the restrictive way Intel seeks to construe it here. Overall, the evidence about other licensing does not show a common, widespread industry practice or understanding that lends much meaning to the terms of the AGP 2.0 Specification and license.

B. VIA’s Promotion of Its Chipsets.

Intel notes that VIA published datash-eets for chipsets that did not support Fast Write, such as the Apollo Pro-Plus VT82C693, yet billed them as “compliant” with AGP 2.0 (e.g., Intel Exh. 16, at 884). According to Intel, this shows, by negative implication, that VIA understood that Fast Write was not required by the AGP 2.0 Specification.

Not so. “Compliant” rather suggests strongly that the product is compatible with other products using AGP 2.0. A product that does not implement Fast Write, an optional feature, could still be compatible with other products using AGP. This view is consistent with VIA’s understanding that any feature required for compatibility with components on the other end of the AGP bus is licensed under the AGP 2.0 license. VIA has never argued that a designer implementing the AGP 2.0 Specification must incorporate Fast Write into its products.

C. Testimony by Intel Employees.

According to Intel, its employees with responsibility for licensing understood that optional features in the AGP 2.0 Specification were excluded from the AGP 2.0 license. The six Intel witnesses who testified that they believed that’ the license excluded “optional” features all had significant managerial responsibility, according to an organizational chart submitted by Intel: (i) Joseph Bond, the attorney who drafted the license, (ii) Patrick Gelsinger, who headed the marketing of all desktop products, (iii) Albert Yu, who headed all of microprocessor marketing, (iv) Daniel Russell, who was directly under Mr. Gelsinger, (v) David Carson, the engineer who drafted the AGP 1.0 Specification, and (vi) Mark Casey, a Platform Marketing Manager. According to Mr. Russell, with Mr. Gelsinger’s input, he decided that only baseline features should be licensed (Russell Dep. 180-83).

Assuming their testimony to be true, it would have little bearing on how a licensee reading the license would interpret it. Every one of these in-house witnesses testified that they never told anyone outside of Intel that optional features of the AGP 2.0 Specification were unlicensed, including even Mr. Bond, to whom others referred licensing questions (Bond Dep. 5; Carson Dep. at 97-98, Casey Dep. 55, Gelsinger Dep. 67, Russell Dep. 77-78, Yu Dep. 71). Under Delaware law, “the subjective beliefs of the parties about the meaning of the contractual language are generally irrelevant. Where one of the parties, however, expresses its beliefs to the other side during the negotiation process or in the course of dealing after consummation, such expressions may be probative of the meaning that the parties attached to the contractual language in dispute.” In re IBP, Inc., No. Civ. A. 18373, 2001 WL 675330 *32 (Del.Ch. June 18, 2001) (citation omitted). Here, the record does not show any of the foregoing internal subjective beliefs were timely communicated to VIA (or even the industry).

In contrast, most of the undisputed facts in the record relate to public statements made by Intel representatives, which tend to support the Court’s construction of the license. For instance, shortly before the AGP 1.0 Specification was released, one of the named inventors of AGP and author of the AGP 1.0 Specification, made a presentation at WinHEC, a trade show sponsored by Microsoft. One of the slides he presented stated that AGP would be: “Licensed under royalty-free, reciprocal terms (similar to USB) to all interested parties” (VIA Exh. 22, at 518). In March 1998, shortly before the AGP 2.0 Specification was published, Mr. Gelsinger was quoted in the Electronic Engineering Times as saying: “It has been our policy ter facilitate standard interfaces, such as PCI and AGP, by creating what we call an ‘IP-free zone’ around them, basically, other companies don’t have to license IP before they can use the standard, this has worked very well in the PC industry, and so far as I know, it is unique to the PC industry” (VIA, Exh. 30, at 3). As already stated, after Intel had published the AGP 2.0 Specification, one of the co-inventors of the ’291 patent gave a presentation on Fast Write at the Intel Developers Forum. At the end of the presentation, he urged industry members to implement AGP 2.0 without stating that Fast Write was unlicensed (VIA, Exh. 35; Rasmussen Dep. 469).

While Intel has offered explanations for these statements, they do not help its case. In sum, consideration of the extrinsic evidence in the record in the light most favorable to Intel would undermine, not support, Intel’s position. Because the meaning of the license is clear on its face, and any ambiguity in the license must be resolved against Intel, VIA is entitled to summary judgment on its defense that it is expressly licensed to practice Claims 1, 4, 6, and 7 of the ’291 patent.

CONCLUSION

For the foregoing reasons, the license at issue includes Fast Write. VIA’s motion for summary judgment is GRANTED and Intel’s cross-motion for summary judgment is DENIED.

IT IS SO ORDERED. 
      
      . The '291 patent is one of three patents that Intel has asserted against VIA's chipsets in this action. The instant motion is but one of several. Currently pending are cross-motions for summary judgment on the validity of the '291 patent and Intel's motion for summary judgment on VIA's counterclaim for fraud. Additionally, several motions for summary judgment on issues related to the other two patents-in-suit shall be heard on November 29 and December 13, 2001.
     
      
      . A port is similar to a bus, except it is dedicated to one device. The technical distinction between a bus and a port is -unimportant herein.
     
      
      . The meaning of the term "open specification” is in dispute and does not form the basis for this order.
     
      
      . The specification states, for instance: “Ports, other than the A.G.P. port, of the corelogic are included for illustrative purposes only and are not required by this interface specification” (AGP 2.0 Specification at 246).
     
      
      . Whether Intel has a patent on 4x is a ques-lion of fact that need not be resolved.
     
      
      . The other Delaware decisions stating contra proferentem should be applied as a "last resort” are likewise distinguishable. Kaiser Aluminum Corp. v. Matheson, 681 A.2d 392, 399 (Del.1996) (contra proferentem should not be used as a "short-cut” for construing complex contracts and should only be used as "last resort” when there is "hopeless ambiguity”); see also Stayton v. Capitol Broad. Corp., 1988 WL 130371 (Del.Supr. Nov. 7, 1988). In one decision cited by Intel, Affordable Home Enterprises, Inc. v. Nelson, No. 91C-08-024, 1995 WL 269159 (Del.Super. Apr. 12, 1995), the court examined extrinsic evidence before turning to contra proferentem. This decision, however, was rendered during the period in which Delaware courts considered extrinsic evidence regardless of whether a contract was clear on its face. Id. at *2 (citing Klair v. Reese, 531 A.2d 219, 223 (Del.1987)). None of these decisions undermines the most-recent pronouncement from the Delaware Supreme Court.
     
      
      . VIA disputes that optional features in the ACR Specification were unlicensed, pointing to a letter from AMD, a proponent of ACR, to Intel. It stated that the licenses for the ACR and the Integrated Packet Bus "apply to all parts of the respective specifications” (VIA Exh. 69, at 2).
     