
    CYRIX CORPORATION, Plaintiff, v. INTEL CORPORATION, Defendant, v. TEXAS INSTRUMENTS, INC., Intervenor.
    No. 4:92cv52.
    United States District Court, E.D. Texas, Sherman Division.
    Jan. 21, 1994.
    
      Albert E. Fey, David J. Lee, Laurence S. Rogers, Kelsey Nix Fish & Neave, New York City, Allan Van Fleet, Vinson & Elkins, Houston, TX, Joe W. Wolfe, Sherman, TX, for plaintiff.
    James J. Elacqua, Danny L. Williams, Peter Shurn, Henry A. Petri, Jr., Arnold, White & Durkee, Houston, TX, Clyde Siebman, Plano, TX, Glen Rhodes, Santa Clara, CA, for defendant.
    Ronald A. Antush, Louis Touton, Dallas, TX, Hal D. Cooper, Cleveland, OH, Larry C. Schroeder, Dallas, TX, for intervenor.
   FINDINGS OF FACT AND CONCLUSIONS OF LAW

PAUL N. BROWN, District Judge.

On November 9, 1993, the parties appeared before the Court without a jury for a trial of the licensing and patent exhaustion issues in this case, and the Court having heard all the testimony and considered all admissible evidence, as well as the argument of counsel and their proposed findings and conclusions, hereby enters its findings of fact and conclusions of law as to the licensing and patent exhaustion issues in this case in conformity with Fed.R.Civ.P. 52. Any finding of fact which constitutes a conclusion of law shall be deemed a conclusion of law, and any conclusion of law which constitutes a finding of fact shall be deemed a finding of fact.

FINDINGS OF FACT

THE PARTIES

1. Cyrix Corporation (hereinafter “Cyrix”) is a Delaware corporation with its principal place of business in Richardson, Texas.

2. Texas Instruments, Incorporated (hereinafter “TI”) is a Delaware corporation with its principal place of business in Dallas, Texas.

3. Intel Corporation (hereinafter “Intel”) is a Delaware corporation with its principal place of business in Santa Clara, California. NATURE OF THE ACTION

4. This is a patent infringement and antitrust action. Cyrix originally commenced this action against Intel on March 25, 1992, seeking a declaratory judgment of non-infringement based on license defenses and patent exhaustion. Intel, in a separate suit, sought judgment that Cyrix had infringed and induced infringement of certain of its patents. Cyrix counterclaimed seeking judgment that Intel had violated the antitrust laws and competed unfairly against Cyrix with respect to the marketing, sale and patenting of microprocessor products. Cyrix also raised affirmative defenses, including invalidity, unenforceability and non-infringement by Cyrix. TI filed a complaint in intervention seeking a declaratory judgment of non-infringement based on license defenses and patent exhaustion. The actions brought by Cyrix and Intel have been consolidated. While other Intel patents and patent claims were originally at issue, the parties agreed to dismissal of all of Intel’s patent claims except those that relate to claims 2 and 6 of U.S. Patent No. 4,972,338 (“the ’338 Patent”).

5. The Court signed an Order on September 22, 1993, bifurcating the patent exhaustion and licensing issues in this action for trial. These issues were set for trial on November 9, 1993, and the issues tried were whether the doctrines of patent exhaustion, implied license and/or legal estoppel bar Intel from charging Cyrix or its customers with infringing the ’338 Patent based on the use or resale of microprocessors made and sold to Cyrix by or on behalf of SGS-Thomson Microelectronics, Inc. (hereinafter “ST”) and TL

THE PARTIES’ STIPULATION

6. The parties are in agreement that the license agreements in effect between Intel and ST and Intel and TI include rights under the ’338 Patent so that both ST and TI have the right to make, use and sell the invention covered by the claims of that patent.

7. For purposes' of this trial the parties stipulated, in pertinent part, as follows:

1. Subject to the provisions for relief set forth in paragraph 4 below- [paragraph 4 of the stipulation is not material to this trial and is, therefore, not set forth], Intel stipulates to the following facts:
a. The commercial transactions between SGS-Thomson and Cyrix and between Texas Instruments and Cyrix, in which silicon wafers containing integrated circuit chips covered by any of the device claims are fabricated by SGS-Thomson or Texas Instruments and sold to Cyrix, constitute authorized sales that exhaust Intel’s rights under its device claims. [Intel v. ULSI, 995 F.2d 1566 at 1569 (Fed.Cir.1993); Cyrix v. Intel v. SGS-Thomson, 803 F.Supp. 1200 at 1206, 1211 (E.D.Tex.1992).]
b. More specifically for purposes of the November 9 trial, the commercial transactions between SGS-Thomson and Cyrix and between Texas Instruments and Cyrix, in which silicon wafers containing integrated circuit chips covered by claim 1 of U.S. Patent No. 4,972,338 are fabricated by SGS-Thomson or Texas Instruments and sold to Cyrix, constitute authorized sales that exhaust Intel’s rights under claim 1.
2. Subject to the provisions for relief set forth in paragraph 4 below, Intel stipulates that the legal conclusions made in the Intel v. ULSI and Cyrix Corp. v. Intel Corp. v. SGS-Thomson decisions are applicable to the commercial transactions as described above in paragraph 1 between SGS-Thomson and Cyrix and between Texas Instruments and Cyrix with respect to the device claims and, more specifically, with respect to claim 1 bf U.S. Patent No. 4,972,338.

THE TECHNOLOGY

8. “Memory management” is the process by which a computer or microprocessor determines which programs and data are in external memory at any given time, and where those programs and data are located in that memory.

9. “Segmentation”, is a memory management technique that divides external memory into variably sized regions called “segments.” Segments are accessed by a microprocessor using “segment descriptors” stored in a “segment descriptor table” in external memory. Each segment descriptor specifies, among other information, the starting or “base” address in external memory, and the length of the segment or the “limit” of an associated segment.

10. “Paging” is another memory management technique that divides external memory into regions called “pages.” Pages, which typically are of the same size, are accessed by a microprocessor using “page table entries” stored in a “page table” in external memory. Each page table entry specifies, among other information, the starting address in external memory of an associated page.

11. A “microprocessor” is an' integrated circuit version of a. central processing unit (“CPU”). A microprocessor typically ■ includes circuitry for fetching, decoding and executing instructions and data from external memory, managing memory, performing arithmetic and logic, and interfacing to external memory. The microprocessor forms the “brain” of a personal computer.

12. The instructions- and data which a microprocessor uses to perform its functions are stored in memory external to the microprocessor. Microprocessors thus require external memory (also called “main,” “primary” and “RAM” memory) in order to function. Without external memory, a microprocessor has no practical use.

13. Microprocessors execute programs from external memory.

14. An “application program” is a program or set of programs used to accomplish a specific task that the user desires the computer to perform. Examples of application programs are word processing programs like WordPerfect, spreadsheet programs like Lotus 1-2-3, and legal research programs like Lexis.

15. An “operating system” is a program or set of programs that provides the basic “services” used by application programs that run on the microprocessor or personal computer. The operating system within a personal computer has specific functions associated with controlling the- computer.

16. Personal computers require that an operating system be loaded and running in the computer before an application program may be executed. Examples of operating systems are Windows, OS/2, UNIX, and DOS.

THE ’338 PATENT AND ITS DEVELOPMENT

17. Intel is the owner by assignment of the ’338 Patent. It was granted to John H. Crawford and Paul S. Ries, is entitled “Memory Management for Microprocessor System”, and was issued November 20, 1990, based on a continuation of an application originally filed June 13, 1985.

18. Intel is also the owner by assignment of United States Patent No. 4,442,484 (“the ’484 Patent”). That patent, granted to Childs, et al., is entitled “Microprocessor Memory Management and Protection Mechanism,” and was issued April 10, 1984.

19. The ’484 Patent describes a memory management system that was used commercially in Intel’s 286 microprocessor. That system, as implemented on the 286 microprocessor, included a segmentation unit for translating a virtual address to a physical address with the segment descriptors being stored in an external memory.

20. John Crawford, one of the named inventors on the ’338 Patent, started work with Intel in August 1977, and at that time, he had received a bachelor’s degree and master’s degree in computer science.

21. From August 1977 to the end of 1981, Mr. Crawford worked at Intel as a computer programmer developing programming tools for the 8086 microprocessor. In early 1982, he transferred to the microprocessor design group where he became the first person to start work on Intel’s 80386 microprocessor.

■22. Mr. Crawford was the chief architect of the 80386 microprocessor which is a physical embodiment of the ’338 Patent. As the architect, he wrote the specification for the product and worked with the chip design team to ensure the product would ultimately meet that specification.

23. At the beginning of the 80386 microprocessor project, one objective was to make the 80386 fully compatible with the 80286 and 8086 microprocessors that were earlier products in the Intel microprocessor product line. A second goal was to extend the 8086 and 80286 16-bit architecture to a full 32-bit capability.

24. By being compatible with the 8086 and 80286 microprocessors, the 80386 would run all of the software that was written to run on the 8086 or the 80286.

25. Running older programs on the 80386 instead of on an 80286 or 8086 would allow the programs to run much faster. The 80386 microprocessor is faster and provides more power than the 80286 and 8086 microprocessors.

26. Compatibility with the 80286 and 8086 microprocessors requires that the memory management mechanism in the 80386 provide memory addressing compatible with those microprocessors.

27. The 32-bit capability objective resulted in a large quantitative difference in the memory management mechanism and also required a large qualitative difference. The 80386 with its 32-bit capability was able to address a much larger memory than could the 80286 or 8086, and the manner in which that larger memory would be managed needed to change accordingly.

28. Messrs. Crawford and Ries improved on the ’484 patented segmentation approach to memory management by adding to that scheme the capability to do paging and a “switch” that allows the user the choice to select either the segmentation mode alone or in combination with the paging mechanism.

29. The patent describes that “[t]he paging translation can be turned off to produce a one-step translation with segmentation only, which is compatible with the 286.” This is to allow the claimed microprocessor device to be backwards compatible with the prior art segmentation-only 286 microprocessor. By turning the paging off to use the prior art with alternative d(i), programs written for the 286 (which did not utilize paging) can be executed without alteration by the claimed microprocessor device.

30. With the availability of the switch, the paging mechanism can be turned off so that only the segmentation mode, which is compatible with the prior art 286 microprocessor, is used. With the paging mechanism turned on, the system is compatible with the 386/486 microprocessors as well.

31. Based on the disclosure of the ’338 Patent, an external memory (referred to in the ’338 Patent as “main memory. 13”) is required for either the segmentation alone or the segmentation in combination with paging modes of operation.

32. In the segmentation alone mode of operation, the microprocessor device of claim 1 of the patent utilizes elements (a), (b), (c)(i) and (d)(i), together with information from segmentation tables or descriptors stored in the external memory;

33. When the switch is used to turn on the paging mode of operation, the microprocessor device of claim 1 of the patent utilizes elements (a), (b), (c)(i), (e)(ii), (c)(iii) and (d)(ii), together wjth paging information stored in the external memory.

CYRIX’S CLAIM 1 MICROPROCESSORS

34. Cyrix’s microprocessors at issue in this action are made and sold to Cyrix by either ST or TI, based upon a design for those circuits initially provided by Cyrix.

35. TI and ST manufacture silicon wafers on which multiple microprocessor chips are formed. The wafers are tested by TI or ST, as the case may be, and then sold to Cyrix. Cyrix then divides the wafers into individual microprocessor chips, mounts each chip in a package suitable for inclusion in an electronic product, does further testing of the packaged chips, and sells the chips under the Cyrix brand name. The model designations of the microprocessor chips at issue in this case include Cx486SLC, Cx486DLC, and Cx486SLC/e.

36. This Court’s Findings Of Fact Nos. 27-39 in Cyrix Corporation and SGS-Thomson v. Intel Corporation, 803 F.Supp. 1200, 1205-06 (E.D.Tex.1992), pertaining to the manufacture by ST of Cyrix FasMath coprocessor integrated circuits, are applicable to and describe ST’s and TI’s. manufacture of Cyrix’s microprocessor circuits.

37. Cyrix targets its microprocessor chips at what it refers to as the high end of the personal computer market, although they are also sold for other applications.

38. Neither Cyrix’s microprocessors, nor the memory management circuitry they contain, can function for any purpose without external memory to store the instructions and data. All external memory of the type required by microprocessors is capable of storing page table entries and segment descriptors.

39. A microprocessor designed in such a manner that it did not require external memory for use would not be a microprocessor in accordance with claim 1 of the ’338 Patent.

40. In the “real mode” of operation, paging is not used in the Cyrix microprocessors.

41. In the “protected mode” of operation, Cyrix’s microprocessors have the capability to address memory using segmentation without paging or using segmentation with paging. ■

THE ’338 PATENT CLAIMS

42. The ’338 Patent includes seven claims. Claim 1, the only independent claim of the patent, is an apparatus claim directed to a memory management circuit for a “microprocessor device.”. Claim 2 is dependent from claim 1, and claim 6 in turn is dependent from claim 2. Dependent claims 2 and 6 claim the microprocessor device of claim 1, in combination with memory having certain capabilities external to that device.

Claim 1

43. The preamble of claim 1 calls for a “microprocessor device.” A microprocessor device is one or more integrated circuits that perform the functions of a central processing unit, and interface with external memory to obtain its instructions and data. The claimed microprocessor device is depicted in Fig. 1 (item 10) of the ’338 Patent.

44. Independent claim 1 of the ’338 Patent claims a microprocessor device comprising circuitry capable of performing both segmentation and paging. The claim includes numerous elements each claiming specific structure (a circuit or a circuit means) and describing the function or functions that structure must be capable of performing.

45. Element (a) of claim 1 recites “an address register means for providing virtual memory addresses.” The phrase “address register means” is claiming circuitry that includes at least one register (a register is a circuit, within the microprocessor, that stores information). The rest of the claim language — “for providing virtual memory addresses” — describes the function that the claimed means must be capable of performing.

46. Element (b) of claim 1 recites a circuit, called a “bus interface unit,” having the functional capability of providing an interface to “address terminal and data terminals of said device.” The address and data terminals is the mechanism by which the microprocessor device would be coupled to external memory, in order for the microprocessor to send information to and to receive information from that memory.

47. Element (c) of claim 1 recites circuitry called an “address translation unit.” This circuitry is claimed as being capable of receiving the virtual memory addresses that would be provided by the address register means of element (a). The remainder of element (c) — namely, elements (c)(i), c(ii) and c(iii) — claim segmentation and paging circuitry forming the components of the address translation unit.

48. Element (c)(i) of claim 1 recites circuitry, called a “segmentation unit,” having at least one circuit called a “segment descriptor resistor” and another circuit called a “comparator.” The rest of the language of this claim element describes the functions that this claimed circuitry must be capable of performing. In particular, the claimed segment descriptor resistor must be capable of storing “a segment base and a limit ..., said limit being of variable size.”

49. Element (c)(ii) and (iii) of claim 1 together describe circuitry forming the paging mechanism within the memory management circuit of the claimed microprocessor device. Element c(iii) describes a circuit, called a “page table addressing means,” capable of “generating a page table address ... for transfer to said bus interface unit [of element (b) ]” and “receiving a page table entry” back from the bus interface unit. Element c(ii) describes a circuit, called a “page cache,” capable of storing within the microprocessor device a copy of page table information previously obtained from the external memory by the circuitry of element c(iii).

50. Element (d) of claim 1 recites a circuit, called an “address generating means,” the function of which is to provide for a choice between two alternative modes of operation of the claimed microprocessor device. In a first mode (specified by element d(ii)) physical addresses are generated by a combination of segmentation and paging (by combining the output of the segmentation unit of element (c)(i) with either the output of the page table addressing means of element c(iii) or the output of the page cache of element c(ii)). In the other alternative mode (described by element d(i)), paging is turned off so that physical addresses are generated without paging by segmentation only.

51. Claim 1 of the ’338 Patent covers circuitry that provides alternative ways of addressing memory. According to claim 1, the address generating means of the circuitry, element (d), may receive either a linear address from the segmentation unit (alternative (d)(i)), or the offset part of the linear address combined with page entry output from the page cache or with a page table entry from the page table addressing means (alternative (d)(ii)).

52. Alternative (d)(ii) of the circuitry covered by claim 1 operates when page addressing of memory is used (“paging mode”). Alternative (d)(i) of the circuitry covered by claim 1 operates when page addressing of memory is not used (“non-paging mode”).

53. Prior to the ’338 Patent invention, segmentation was known in the art. Likewise, paging was known in the prior art before thé ’338 Patent invention. Thus, the ’338 Patent claim 1 is directed to more than simply a paging system. “Paging” is not the invention of the Crawford ’338 Patent.

54. The invention described in claim 1 of the ’338 Patent is not merely segmentation plus paging. A claim to segmentation plus paging was presented to the United States Patent and Trademark Office while the ’338 Patent application was under review, and the Patent Office examiner rejected that claim.-

55. Element (c)(i), the segmentation unit of the microprocessor device, is used when alternative (d)(i), non-paging mode, is selected.

56. A microprocessor that has all the elements of claim 1 is still a claim 1 microprocessor even if it only exercises one of the element (d) alternatives; that is, alternative (d)(i) or (d)(ii).

57. There are both speed and time penalties associated with the use of paging in the claim 1 microprocessor. When using the external memory to store page table entries, time is required to go to the external memory to fetch those page table entries. In addition, storage-of the page table entries in the external memory consumes an amount of memory that would otherwise be used for storing'programs and data.

58. The microprocessor device described in claim 1 was intended to be used with external memory. The device has no utility and is inoperable unless combined with external memory.

59. The claim 1 microprocessor device was intended for use with other integrated circuits and components in a working computer system.

60. The word “storing” in the context of claim 1, element (e)(i), conveys several meanings. First, it indicates that when using the microprocessor device, the segment descriptor register actually stores the base address and limit. Second, the word “storing” helps to explain the structure of the segment descriptor register described in element (c)(i). In this sense, the word “storing” helps define the substructure of the register as including at least two parts, a base address and a limit, and it helps identify connections between the register and other elements in the claim. Third, the word “storing” in element (e)(i) indicates what the segment descriptor register will necessarily be doing when it is powered up.

61. The microprocessor device claimed by claim -1, in order to be used, requires external memory. This is -demonstrated by the plain language of the claim itself, the specification (figures and written text) of the ’338 Patent, and statements made by Intel to the Patent Office. Figure 1 of the patent specifically shows the microprocessor device coupled to external memory in the form of “RAM main memory 13.” The microprocessor device of claim 1, in order to be used, thus would be expected to require external memory in order to be used.

Element (b) of claim 1, requiring a “bus interface unit,” confirms that the claimed microprocessor device requires external memory in order to be Used. The only function claimed for the bus interface unit is to provide an interface to the microprocessor’s address and data terminals. The purpose of these terminals, as understood by a person skilled in the art and as confirmed by the patent (Figure 1), is to couple the microprocessor to external memory from which it receives its instructions and data. This purpose of element (b) is illustrated by element c(iii) of claim 1, which requires the claimed “page table addressing means” be capable of transferring page table addresses to the bus interface unit and receiving page table entries from the bus interface unit. The only way information could be received from the bus interface unit is if it came from external memory.

62. In connection with an application continued from the ’338 Patent application, Intel sought to broaden the language of element (b) for the stated reason of covering devices that stored page table entries in “on-chip” (i.e., internal) rather than external memory. Intel’s statements to the Patent Office establish that claim 1 of the ’338 Patent would not cover devices using only internal, rather than external, memory.

63. In order to be covered by claim 1 of the ’338 Patent, a physical embodiment of the microprocessor device must have every circuit element of the claim, including element (d).

64. Claim 2 is an apparatus claim dependent from claim 1. The claim includes two structural elements. It recites the microprocessor device of claim 1, combined with “a memory external to said device” which has certain capabilities. More particularly, the claim specifies that the external memory must have the capability of “storing said page table entries” (i.e., the page table entries that page table addressing means may receive from the bus interface unit in element c(iii) of claim 1) and of being “accessed by said physical address received from said terminals of said device.”

65. Claim 6 depends from claim 2. Claim 6 adds no structural elements to either claim 1 or claim 2. Rather, the claim specifies, as an additional capability, that the external memory of claim 2 “also stores a plurality of segment descriptors for transfer to said segment descriptor register.”

66. As explained by Cyrix’s expert witness Dr. George Ligler, and as confirmed by TI’s expert witness Prof. Joseph Watson, a person of ordinary skill in the art would

understand that claims 2 and 6 cover the combination of two structural elements. These elements are: (1) the microprocessor device of claim 1, combined with (2) an external memory having the capability of storing page table entries (in the case of claim 2) and segment descriptors for transfer to the microprocessor’s segment descriptor resistor (claim 6). In order to form the combination of and to infringe claims 2 and 6, therefore, it is not necessary at the time of infringement that page table entries and segment descriptors actually be stored in the external memory.

67. Dr. Ligler’s and Prof. Watson’s common understanding and interpretation of claims 2 and 6, as not requiring that page table entries or segment descriptors actually be stored in external memory, is demonstrated by the plain language of the claims themselves. In addition, this interpretation of claims 2 and 6 is confirmed by: (1) Intel’s assertions that claim 1 covers Cyrix’s microprocessors as made and sold to Cyrix in wafer form by ST and TI, and as re-sold in packaged form by Cyrix to its customers, and (2) the manner in which Intel interpreted claims 2 and 6 during attempts to license those claims to third parties. Intel has asserted that Cyrix’s microprocessors as made and sold to Cyrix by ST and TI in wafer form, and as re-sold by Cyrix to its customers in packaged form, are “covered” by claim 1 of the ’338 Patent. Because Cyrix’s microprocessors at these points in time do not in fact store anything, Intel could only have been interpreting the functional language of claim 1 — including that of element c(i) calling for “at least one segment descriptor register [sic.] storing a segment base and a limit” — as requiring only the capability of storing rather than actually storing. The only consistent way to interpret the identical functional language in claim 2 is to read that claim as also requiring only the capability of storing page table entries in external memory.

68. In three separate ’338 Patent license agreements that Intel proposed to Compaq, Dell and Tandy in the Fall of 1992, Intel defined claims 2 and '6 of the ’338 Patent as requiring a microprocessor combined with external memory “storing page table entries or capable of storing page table entries."

69. Finally, this interpretation of claims 2 and 6 — as not requiring that page table entries and segment descriptors actually be stored in external memory — is consistent with the way Intel and its expert Neuhauser used to interpret the claims in this and other litigation. See, for example, the November 23, 1992 declaration in this action by Intel’s expert Dr. Neuhauser, where claim 2 was defined as requiring a memory external to the microprocessor “for storing page table entries” (emphasis added). Also consistent is Intel’s statement of undisputed facts-in Intel v. Chips & Technologies, where Intel asserted that claims 2 and 6 of the ’338 Patent were infringed when Chips’ microprocessors were combined with “internal [sic., external] memory for use in storing page tables” (emphasis added).

70. Intel asserts that claims 2 and 6 add more than just external memory to claim 1. According to Intel, ■ claims 2 and 6 cover the combination of: (i) a microprocessor as recited in claim 1 with (ii) external memory that is actually — rather than just capable of — (iii) storing page table entries (claim 2) and segment descriptors (claim 6). Intel’s interpretation of claims 2 and 6, however, is not credible. It is inconsistent with the manner in which Intel is interpreting claim 1 now, and the way in which Intel has interpreted claims 2 and 6 in the past.

71. Patentee Crawford also testified on cross examination that claim 1 covered Intel’s 386 and 486 microprocessor devices in wafer and packaged form, even when those microprocessors were not operating and thus were not, in fact, “storing” a segment base and limit as recited by element c(i) of claim 1. Mr. Crawford testified precisely the opposite,, however, that claims 2 and 6 did not cover the combination of Intel’s microprocessors with external memory when the combination was not operating because the memory was not “storing” page table entries or segment descriptors as recited in claims 2 and 6. The “storing” language in claims 1 and 2 is identical. Mr. Crawford’s interpretation of claim 1, as not requiring the actual storing of information, was inconsistent with — and diametrically opposed to — his interpretation of claims 2 and 6 as in fact requiring the actual'Storage of information and was not credible.

THE TI/INTEL LICENSE AGREEMENTS

The 1971 Agreement

72. TI and Intel entered into a patent cross-license agreement as of September 1, 1971 (the “1971 Agreement”). The 1971 Agreement conferred licenses under TI and Intel patents that issued from applications with effective filing dates prior to September 1, 1976. The 1971 Agreement expired on September 1, 1976, although rights under licensed patents survived' the expiration. The 1971 Agreement was a broad cross-license which granted each party a non-exclusive, royalty free license under the patents of the other party “to make (but not to have made) LICENSED PRODUCTS worldwide except in Japan and to use, to lease, to sell or to otherwise dispose of, anywhere in the world, such LICENSED PRODUCTS.”

73. By 1976, TI had obtained several United States patents covering a microprocessor chip combined with other components to make a functioning “microprocessor system.” Intel’s rights under the 1971 Agreement were limited to individual integrated circuits and did not extend to combinations such as those being made and sold by Intel in the 1976-77 time frame as boards.

74. The 1971 Agreement was a semiconductor agreement and was not concerned with systems in which the semiconductor might be used. The purpose of Article III, Section 4 of the agreement was to make it clear that the purchase of a semiconductor in the form of an INTEGRATED CIRCUIT did not. confer on .the purchaser a license under other patents to combine that INTEGRATED CIRCUIT with other components to make, for example, a television set or a personal computer.

75. The 1971 agreement also contained in Article III Section 4 an -express limitation on the license rights that TI and Intel had under the agreement: “Nothing contained in this Agreement shall be construed as: conferring by implication, estoppel or otherwise, upon- any party licensed hereunder, any license or other right under any patent except the licenses and rights expressly granted hereunder.”

76. Under the clear terms of the 1971 agreement, TI and Intel could claim a license only for the specifically listed licensed products, and no other implied licenses, (because of Art. VII, § 2(e)), and third parties obtaining those products from TI or Intel could not claim an implied license to make combinations incorporating those products (because of the Art. Ill, § 4 prohibition).

The 1976 Agreement

77. In 1977, TI and Intel entered into a new patent cross-license agreement effective as of September 1, 1976 (the “1976 Agreement”). The 1976 Agreement conferred licenses under TI and Intel patents that issued from applications with effective filing dates before September 1, 1986. Under the 1976 Agreement, the licenses conferred remain in force for the lives of the licensed patents.

78. Mr. Roger Borovoy, general counsel for Intel, approached TI and suggested that the 1971 Agreement should be extended and expanded to include certain additional features. Those new features expanded the license to include, for example, two additional LICENSED PRODUCTS, namely, MICROPROCESSOR SYSTEMS and ELECTRONIC TIME PIECES, to include “have made” rights, and to become a world-wide license.

79. Negotiations toward renewal of the TI/Intel license agreement were carried on by Roger Borovoy for Intel and by Ron Keener and Richard Donaldson for TI.

80. In negotiating the- 1976 Agreement, the intentions of the parties were to allow each party to continue to pursue its business interests, including the marketing of microprocessors, free from interference from the patents of the other covering LICENSED PRODUCTS.

81. The solution devised by the parties to allow each of them to continue to pursue their business interests with respect to microprocessors was to create a new class of LICENSED PRODUCTS designated as MICROPROCESSOR SYSTEMS. This new class of product is defined in Article I, Section 9 as follows:

Section 9. “MICROPROCESSOR SYSTEMS” means any instrumentality or aggregate of instrumentalities, primarily designed around a central processing unit (CPU) embodied in approximately 25 or less INTEGRATED CIRCUITS, adapted to compute, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, measure, detect, record, reproduce, handle, or utilize any form of information, intelligence or data for business, scientific control or other purposes.

82. The section listing LICENSED PRODUCTS in the 1976 Agreement was also revised to read as follows:

Section 11. “LICENSED PRODUCTS” means any of the following items (a)-(g) and/or parts thereof, whether or not incorporated in more comprehensive equipment:
(a) SEMICONDUCTIVE MATERIAL
(b) JUNCTION MATERIAL
(c) INTEGRATED CIRCUITS
(d) SEMICONDUCTIVE ELEMENTS
(e) TEST EQUIPMENT AND SYSTEMS
(f) MICROPROCESSOR SYSTEMS
(g) ELECTRONIC TIME KEEPING DEVICE.

83. In the 1976 Agreement, Article III, Section 4 and Article VII, Section 2(e) were continued from the 1971 Agreement without modification or revision.

84. By adopting the definition of MICROPROCESSOR SYSTEMS set out in Article I, Section 9 of the 1976 Agreement, the parties made it clear that they considered a CPU, i.e., a microprocessor chip, to be functionally interrelated with other chips required to make the CPU operational in a system. The parties also thereby made it clear that the exclusion of Article III, Section 4, which by its terms is applicable only to “separate” LICENSED PRODUCTS, does not apply to the situation involving a MICROPROCESSOR SYSTEM.

85. Intel’s ’338 Patent is expressly licensed under the 1976 agreement to TI. Article VII, Section 2(e), which is concerned with rights under patents not expressly licensed, has no relevance or application to the issues in this case.

86. Article III, Section 4 of the 1976 Agreement only applies to a “release or license.” That provision does not impact the doctrine of patent exhaustion.

87. Cyrix’s microprocessors that are made and sold to Cyrix by TI are “Licensed Products” under the terms of the Intel-TI License Agreement.

88. “MICROPROCESSOR SYSTEMS” are defined in the 1976 agreement as any instrumentality or aggregate of instrumentalities, primarily designed around a central processing unit (CPU) embodied in approximately 25 or less INTEGRATED CIRCUITS, adapted to compute, classify, process, transmit, receive, retrieve, originate, switch, store, display, manifest, measure, detect, record, reproduce, handle, or utilize any form of information, intelligence or date for business, scientific, control or other purposes.

89. When “Microprocessor Systems” were added as licensed products in the 1976 agreement, TI and Intel could then make and sell those systems (free of claims from one and other) because they were then éxpressly licensed. The Art. VII, § 2(e) prohibition against the parties claiming an implied license no longer applied because the systems were now expressly licensed to TI and Intel.

90. TI’s own witness testified that the system described in claims 2 and 6 of the ’338 Patent is not a “Microprocessor System” under the definition in the 1976 agreement. TI’s expert, Dr. Watson, testified that a “Microprocessor System” includes “a microprocessor, memory, I/O provisions and the inter-connections between those chips, basic control function” and that claim 2 does not describe a Microprocessor System, but only a portion of a Microprocessor System.

91. A combination of components that was not a microprocessor system does not fall -within the definition of “Microprocessor System” as recited in the agreement for licensed products.

92. Even if the combination of claims 2 and 6 is considered to be a “Microprocessor System,” that combination' is not excluded from the provisions of Art. Ill, § 4. Although the definition of “Microprocessor Systems” was added in the 1976 agreement, the Art. Ill, § 4 prohibition was unchanged and applies “[a]nything in the Agreement to the contrary notwithstanding.”

93. If TI is not making and selling the combination, TI’s customers cannot obtain the right to make the combination.

94. A third party to the agreement cannot get any license rights that a party to the agreement did not have. TI by selling semiconductor devices cannot pass on a license to third parties to build personal computers. Likewise, a PC that incorporates a Cyrix microprocessor is not a licensed product under the TI-Intel agreement.

95. The Intel-TI agreement addresses the extension of express or implied licenses as follows:

Section A Anything in this Agreement to the contrary notwithstanding, no release or license is granted by either party or any SUBSIDIARY sublieensed hereunder either directly or by implication, estoppel or otherwise under any patent licensed hereunder, to third parties acquiring products from either party or any SUBSIDIARY sublicensed hereunder for the combination of separate products licensed hereunder with each other or with any other product.

96. The third party combination prohibition of Art. Ill, § 4 of the 1976 agreement was identical to that in the prior agreement. Just as under the 1971 agreement, third parties acquiring licensed products, such as microprocessors, from TI or Intel could not claim an implied license to make combinations incorporating those products.

97. The Art. Ill, § 4 prohibition is clear: No license may be implied for third parties to make combinations of separate products licensed under the TI-Intel agreement, either with other licensed products or with unlicensed products.

98. The phrase “separate products” in the Art. Ill, § 4 prohibition is not qualified by any terms such as “except for microprocessors and memories” or “except for microprocessor systems.”

99. The license grant provisions, the restrictions on customers’ right to make combinations, and the limitations on the licenses granted in the TI-Intel agreement are mutual as between Intel and TI.

100. Memory devices such as ROMs and DRAMs are separately licensed products under the TI-Intel agreement.

101. Microprocessors, displays, and keyboards are separate products, the combination of which is subject to the prohibitions of Art. Ill, § 4 of the TI-Intel agreement. THE INTEL-ST PATENT LICENSE AGREEMENT

102. In March 1977, Intel and Mostek (now ST) entered into a patent cross-license agreement (the Intel-ST patent license), the terms of which provided that each party granted to the other a license “to make, to have made, to use, to sell (either directly or indirectly), to lease and to otherwise dispose of Licensed Products.”

103. Under the Intel-ST License Agreement, “Licensed Products” are defined as “any product ... manufactured, used or sold by either party covered by patents of the other party.”

104. The Intel-ST License Agreement does not include any language restricting, limiting or negating in any way, either expressly or impliedly, the manner in which Licensed Products may be used or sold by ST or ST’s customers.

PATENT EXHAUSTION/IMPLIED LICENSE

105. Prior art to the ’338 Patent includes the memory management mechanism used on the Intel 80286 microprocessor chip, as described in the ’484 Patent owned by Intel. The Intel 80286 microprocessor had on-chip segmentation circuitry and required external memory to be operable. The advance of the ’338 Patent over the memory management system used on the 80286 microprocessor was the addition of on-chip paging circuitry and the capability to switch between segmentation alone or in combination with paging. The addition of on-chip paging circuitry and the ability to choose between the prior art segmentation alone and the combination of segmentation plus paging are essential features of claims 1, 2, and 6 of the ’338 Patent.

106. The ’338 Patent describes a microprocessor system, which includes a microprocessor and a data memory. The microprocessor device described by claim 1 of the ’338 Patent cannot function, and has no utility, unless combined in a system with external memory.

107. The paging and segmentation circuitry of the claim 1 microprocessor device requires external memory to function. The paging and segmentation circuitry of claim 1 uses external memory to store segment descriptors and page table entries.

108. Cyrix microprocessor chips require page tables (holding page table entries) to be stored in external memory in order to use the paging circuitry on the chips.

109. A system in which a claim 1 microprocessor device would have utility is incomplete and unfinished until external memory as described by claims 2 and 6 has been added to that system.

110. Any commercially available memory that would be used with a Cyrix microprocessor would have the capability of storing page table entries and segment descriptors, ie., of performing the functions recited in claims 2 and 6.

CONCLUSIONS OF LAW

1. This Court has jurisdiction over the parties and over the subject matter of this action pursuant to 28 U.S.C. §§ 1337(a), 1338(b), and 1367(a). Venue in this Judicial District is proper.

2. The parties are bound, under principles of res judicata and collateral estoppel, by this Court’s Findings of Fact and Conclusions of Law, and Declaratory Judgment, in Cyrix Corp. v. Intel Corp., 803 F.Supp. 1200 (E.D.Tex.1992). Foster v. Hallco Mfg. Co., Inc., 947 F.2d 469, 475 (Fed.Cir.1991); MGA, Inc. v. General Motors Corp., 827 F.2d 729, 731-3 (Fed.Cir.1987), cert. denied, 484 U.S. 1009, 108 S.Ct. 705, 98 L.Ed.2d 656 (1988).

Cyrix, as the party asserting a license under Intel’s patents, bears the burden of proof on the license defense, Met-Coil Systems Corp. v. Korners Unlimited, Inc., 803 F.2d 684, 687 (Fed.Cir.1986), as well as on the issue of patent exhaustion.

EXPRESS LICENSE

The Intel-ST Agreement

3. Delaware law governs the construction of the Intel-ST agreement.

4. Under Delaware law, the proper interpretation of the language in a contract is treated as a question of law. Klair v. Reese, 531 A.2d 219, 222 (Del.1987). If the instrument is clear and unambiguous on its face, the Court may not consider parol evidence to interpret it or to search for the parties’ intentions. Pellaton v. Bank of New York, 592 A.2d 473, 478 (Del.1991).

5. As a matter of law, the Intel-ST agreement is unambiguous; therefore, no extrinsic evidence regarding the intent of the parties is admissible.

The Intel-TI License Agreement

6. In accordance with the express language of the Intel-TI license agreement, New York law applies to and governs its interpretation.

7. Under New York law Construction of a contract is a question of law to be decided by the Court when the terms of the agreement are unambiguous and its meaning is unaffected by parol evidence. Schulman Investment Co. v. Olin Corp., 477 F.Supp. 623, 627 (S.D.N.Y.1979).

8. The Intel-TI agreement is unambiguous as a matter of law.

9. The Intel-TI license unambiguously granted to TI “non-exclusive, royalty-free, worldwide licenses under LICENSEE PATENTS to make, to have made, to use, to lease, to sell or to otherwise dispose of, such LICENSED PRODUCTS.”

10. The Intel-TI license expressly provides that no license under Intel’s system claims extends to customers such as Cyrix.

Cyrix Has No Express License

11. Cyrix does not have an express license to make, to have made, to use, to sell or to otherwise dispose of the microprocessors in question under either the Intel-ST License Agreement or the Intel-TI License Agreement, and Cyrix has abandoned any claim of an express license.

THE LAW OF CLAIM INTERPRETATION AND PATENT INFRINGEMENT

12. Determining whether a patent claim is infringed, by “covering” or “reading on” an accused device, involves two inquiries: (1) interpreting the claims, and (2) comparing the properly interpreted claims to the device. Read Corp. v. Portec, Inc., 970 F.2d 816, 821 (Fed.Cir.1992); Moeller v. Ionetics, Inc., 794 F.2d 653, 656 (Fed.Cir.1986).

13. Proper claim construction necessarily precedes determining whether a claim in suit covers an accused device. Claim construction generally involves examining the specification, prosecution history, and other claims of the patent. Lemelson v. United States, 752 F.2d 1538, 1549 (Fed.Cir.1985); Fromson v. Advance Offset Plate, Inc., 720 F.2d 1565, 1569 (Fed.Cir.1983).

14. Claims are construed as a matter of law by the District Court. However, the comparison of properly construed claims to an accused device — the ultimate question of infringement — is a matter of fact. Lemelson v. United States, 752 F.2d 1538, 1547 (Fed.Cir.1985); Intellicall, Inc. v. Phonometrics, Inc., 952 F.2d 1384, 1387 (Fed.Cir.1992); ACS Hosp. Systems, Inc. v. Montefiore Hosp., 732 F.2d 1572 (Fed.Cir.1984).

15. Although the interpretation and construction of a claim is for the Court to decide, it is proper and appropriate for the Court to receive expert testimony and evidence concerning the meaning and scope of the claims at issue. Failure to admit such evidence can be reversible error. Moeller v. Ionetics, Inc., 794 F.2d 653, 657 (Fed.Cir.1986).

16. In interpreting claims, it is improper for courts to read into an independent claim a limitation explicitly set forth in another claim. Environmental Designs, Ltd. v. Union Oil Co., 713 F.2d 693, 699 (Fed.Cir.1983), cert. denied, 464 U.S. 1043, 104 S.Ct. 709, 79 L.Ed.2d 173 (1984); D.M.I., Inc. v. Deere & Co., 755 F.2d 1570, 1574 (Fed.Cir.1985).

17. “The concept of claim differentiation states that claims should be presumed to cover different inventions.” Carborundum Co. v. Combustion Eng’g, Inc., 505 F.Supp. 1011, 1017 (D.Del.1981). Each claim of a patent constitutes a separate invention and gives rise to separate rights. Jones v. Hardy, 727 F.2d 1524, 1528 (Fed.Cir.1984).

18. A court may neither broaden nor narrow claims to give the patentee something different than what he has set forth in issued claims. Texas Instruments, Inc. v. U.S. Int’l Trade Comm’n, 988 F.2d 1165, 1171 (Fed.Cir.1993) (rejecting an argument by Texas Instruments to read an express limitation out of a claim).

19. Once the claims are properly construed, the remainder of the issues must be resolved with respect to Cyrix’s microprocessor, not a hypothetical “claim 1” microprocessor. See Bandog, Inc. v. Al Bolser’s Tire Stores, Inc., 750 F.2d 903, 924 (Fed.Cir.1984); Stukenborg v. United States, 178 Ct.Cl. 738, 372 F.2d 498 (1967).

20. An apparatus claim may be infringed in any of three disjunctive ways: by making, by using or by selling the claimed device. 35 U.S.C. § 271.

21. Infringement of an apparatus claim occurs “when the claimed combination has been assembled and is used or is available for use.” Lemelson v. United States, 752 F.2d 1538, 1548 (Fed.Cir.1985) (emphasis added). Also see Decca Ltd. v. United States, 225 Ct.Cl. 326, 640 F.2d 1156, 1168 (1980), cert. denied, 102 S.Ct. 99, 70 L.Ed.2d 89 (1981); Paper Converting Machine Co. v. Magna-Graphics Corp., 745 F.2d 11, 19-20 (Fed.Cir.1984).

22. To infringe an apparatus claim, it is not necessary for an accused device actually to be performing the functions specified by the claim. All that is required is that the device have the claimed structure, and that this structure in the device have the capability of functioning as described by the claim. See Intel Corp. v. U.S. Intern. Trade Com’n, 946 F.2d 821, 832 (Fed.Cir,1991):

“GI/M also contends that the Commission’s finding of infringement under the doctrine of equivalents is incorrect because, although GI/M’s ‘old’ design 51 Series EPROMs are capable of performing page mode addressing, the EPROMs were never sold to operate in page mode____ Because the language of claim 1 refers to ‘programmable selection means’ and states ‘whereby when said alternate addressing mode is selected’ (emphasis added), the accused device, to be infringing, need only be capable of operating in the page mode. Contrary to GI/M’s argument, actual page mode operation in the accused device is not required.” (Emphasis in original.)

Also see Application of Bozek, 416 F.2d 1385, 1390 (CCPA 1969). (“It seems to us that the only rational way in which 35 U.S.C. § 112 can be interpreted is to require that the ‘means * * * for performing a specified function’, in order to be accorded structural significance, be a means which possesses a presently existing function or a presently existing capability to perform a function.” (emphasis and deletion in original)); Mendenhall v. Astec Industries, Inc., 13 U.S.P.Q.2d 1913, 1922, 1988 WL 188449 (E.D.Tenn.1988) (“claims 1 and 12 are not limited to equipment which actually is in the process of introducing ‘asphaltic concrete particles’ into the cooler zone of the drum, as long as the equipment has the presently existing capar bility of performing this function ” (emphasis added)), aff'd, 887 F.2d 1094 (Fed.Cir.1989); and Application of Casey, 370 F.2d 576, 580 (C.C.P.A.1967).

INTERPRETATION OF CLAIMS 2 AND 6 OF THE ’338 PATENT

23. A claim 1 microprocessor in combination with external memory infringes claims 2 and 6 if the external memory is capable of “storing said page table entries” (claim 2) and a “plurality of segment descriptors” (claim 6). Actual storing of page table entries and segment descriptors in the external memory is not required at the time of infringement of claims 2 and 6.

24. Intel’s assertion that claims 2 and 6 require the step of actually storing page table entries and segment descriptors in external memory and until that process is performed, the limitations of claims 2 and 6 are not met, is wrong as a matter of law. Intel is trying to read into device claims 2 and 6 a method of operating the device. This is improper because it is mixing two different classes of invention — a product and a process — in the same claim. Ex parte Lyell, 17 U.S.P.Q.2d 1548, 1551-52 (PTO Bd.Pat.App. & Inter.1990) (“appellant’s claim 2, which purports to be both an apparatus and a process in a single claim, is ambiguous and properly rejected”). See also Deller, Patent Claims, Chap. VIII and Chap. IX (2d ed., 1971) at § 133 (“A claim is single and is either for a process or product.... An applicant for a patent may separately claim a patentable process and a patentable product, but cannot properly cover them both in one claim.”). The court giving deference to the patent office must presume that claim 2 since allowed was a proper claim. Morgan v. Daniels, 153 U.S. 120, 14 S.Ct. 772, 38 L.Ed. 657 (1894); American Hoist & Derrick Co. v. Sowa & Sons, Inc., 725 F.2d 1350, 1359 (Fed.Cir.), cert. denied, 469 U.S. 821, 105 S.Ct. 95, 83 L.Ed.2d 41 (1984). The only interpretation of claim 2 which would make claim 2 a proper claim is the interpretation that claim 2 is an apparatus claim with functional language. Ex parte Lyell, 17 U.S.P.Q.2d 1548, 1551-52 (PTO Bd.Pat.App. & Inter.1990).

CYRIX’S MICROPROCESSORS, AND CLAIMS 2 AND 6

25. Cyrix’s microprocessors have no uses unless they are combined with external memory capable of holding page table entries and segment descriptors as described by claims 2 and 6. Thus, to the extent that Intel has asserted that claim 1 of the ’338 Patent covers Cyrix’s microprocessors — both as made and sold to Cyrix by ST and TI, and as used and re-sold by Cyrix and/or its customers — those microprocessors cannot be used for any purpose without necessarily forming the combination of, and infringing, claims 2 and 6.

26. Even if Intel’s interpretation of claims 2 and 6 were the correct one, the invention of claim 1 that Intel asserts is embodied within Cyrix’s microprocessors still would have no use unless the microprocessors were combined with external memory holding page table entries and segment descriptors. Thus, to the extent that Intel has asserted that Cyrix’s microprocessors are claim 1 microprocessors, the alleged claim 1 invention embodied within the microprocessors still could not be used for any purpose without necessarily forming the combination of, and infringing, claims 2 and 6.

27. No factual disputes exist regarding evidentiary material necessary to construction of the claims, such as the specification and the prosecution history. See C.R. Bard, Inc. v. Advanced Cardiovascular Systems, Inc., 911 F.2d 670, 673 (Fed.Cir.1990). Further, the claim terms have not been shown to be technical terms that require expert testimony. Howes v. Medical Components, Inc., 814 F.2d 638, 643 (Fed.Cir.1987).

28. It is well-established in patent law that a patent claim covers the totality of the elements in the claim and that no element, separately viewed, is within the grant. Aro Mfg. Co. v. Convertible Top Replacement Co., Inc., 365 U.S. 336, 344, 81 S.Ct. 599, 604, 5 L.Ed.2d 592 (1961). The Supreme Court has made it clear that there is no legally recognizable or protected “essential” element, “gist” or “heart” of the invention in a list of elements making up a patent claim. Id.

29. Claim 1 covers a microprocessor device having all of the limitations of claim 1, including alternative circuitry to allow selectivity between a paging and a nonpaging mode.

30. The invention of claim 1 is infringed by Cyrix’s microprocessors regardless of whether the paging or the nonpaging mode is ultimately selected.

PATENT EXHAUSTION

The Patent Exhaustion Doctrine

31. A patent owner’s monopoly ends with the first sale or disposition by a patentee, or his licensee acting within the scope of the license, of an article embodying the invention of the patent. United States v. Univis Lens Co., 316 U.S. 241, 250, 62 S.Ct. 1088, 1093, 86 L.Ed. 1408 (1942):

The patentee may surrender his monopoly in whole by the sale of his patent or in part by the sale of an article embodying the invention. His monopoly remains so long as he retains the ownership of the patented article. But sale of it exhausts the monopoly in that aHicle and the patentee may not thereafter, by virtue of his patent, control the use or disposition of the artiicle. Bloomer v. McQuewan, 14 How. 539, 549-50 [14 L.Ed. 532 (1852) ]; Adams v. Burke, 17 Wall. 453 [21 L.Ed. 700 (1873)]; Hobbie v. Jennison, 149 U.S. 355 [13 S.Ct. 879, 37 L.Ed. 766] (1893)]. (emphasis added)

32. Patent exhaustion is a fundamental doctrine of patent law first enunciated by the Supreme Court nearly 120 years ago. Adams v. Burke, 84 U.S. (17 Wall.) 453, 456, 21 L.Ed. 700 (1873):

[I] n the essential nature of things, when the patentee, or the person having his rights, sells a machine or instrument whose sole value is in its use, he receives the consideration for its use and he parts with the right to restrict that use. The aHicle, in the language of the couH, passes without the limit of the monopoly. That is to say, the patentee or his assignee having in the act of sale received all the royalty or consideration which he claims for the use of his invention in that particular machine or instrument, it is open to the use of the purchaser without further restriction on account of the monopoly of the patentees, (emphasis added) (citations omitted)

33. An authorized sale of a patented product exhausts the patent monopoly as to that product. Thus, a purchaser of such a product from a patent owner may use or resell the product free of control or conditions imposed by the patent owner. See United States v. Univis Lens Co., 316 U.S. 241, 62 S.Ct. 1088, 86 L.Ed. 1408 (1942); Adams v. Burke, 84 U.S. (17 Wall.) 453, 21 L.Ed. 700 (1873).

34. The Patent Exhaustion Doctrine applies as well to the disposition of a product under a license as it does to outright sale. See generally United States v. Masonite Corp., 316 U.S. 265, 278, 62 S.Ct. 1070, 1077, 86 L.Ed. 1461 (1942) (“[T]his Court has quite consistently refused to allow the form into which the parties chose to cast the transaction to govern. The test has been whether or not there has been such a disposition of the article that it may fairly be said that the patentee has received his reward for the use of the article.”).

35. An authorized sale of the patented invention by a licensee to a third party places any resale by the third party beyond the reach of the infringement statute by reason of the third party’s “authority to resell the product” derived from the licensee. Unidisco, Inc. v. Schattner, 824 F.2d 965, 968 (Fed.Cir.1987), cert. denied, 484 U.S. 1042, 108 S.Ct. 774, 98 L.Ed.2d 860 (1988). Furthermore, resale following an authorized sale by a licensee does not create a sublicense. Lisle Corp. v. Edwards, 777 F.2d 693, 695 (Fed.Cir.1985).

36. The non-paging uses of Cyrix microprocessors proposed by Intel are not non-infringing uses of claims 2 and 6. The uses of Cyrix microprocessors proposed by Intel for upgrades and sales to system licensees are not non-infringing uses of claims 2 and 6 that would defeat creation of an implied license or preclude exhaustion of Intel’s rights under those claims.

37. Because all claim 1 microprocessors must be combined with external memory to be useful, a claim (such as claim 2) describing a device consisting of a claim 1 microprocessor and external memory would be exhausted by the sale of the claim 1 microprocessor. See United States v. Univis Lens Co., 316 U.S. 241, 249-51, 62 S.Ct. 1088, 1092-94, 86 L.Ed. 1408 (1942). Where, as here, the rights in a claim for a combination are exhausted by the sale of a component of the combination [claim 1 microprocessor], the patentee cannot escape exhaustion by specifying that the combined component [external memory] be performing a specific function when that function is an inherent capability of that component. See Application of Swinehart, 439 F.2d 210, 212-13 (UCCPA 1971).

38. The purpose of the patent exhaustion doctrine, e.g. preventing patentees from extracting double recoveries for an invention, is defeated if the patent owner can “invent” a non-infringing use by licensing systems.

Effect of Intel-TI and Intel-ST License Agreements

39. The express terms of the Intel-TI Agreement and Intel-ST Agreement are consistent with the Patent Exhaustion Doctrine. In both agreements Intel granted a license “to make, to have made, to use, to sell, to lease and to otherwise dispose of ‘Licensed Products.’ ” Thus, by operation of law and contract, any disposition of a Licensed Product by a licensee under the Intel-TI Agreement — by sale or otherwise— exhausts Intel’s patent rights with respect to that article.

40. This law has also been applied repeatedly by the Court of Appeals for the Federal Circuit in circumstances applicable here, where integrated circuit products are made and sold by a semiconductor foundry to the person or entity who designed the products. Intel Corp. v. ULSI System Technology, Inc., 995 F.2d 1566, 1568 (Fed.Cir.), petition for cert. filed, 62 U.S.L.W. 3396 (1993):

“The law is well settled that an authorized sale of a patented product places that product beyond the reach of the patent. See Bloomer v. Millinger, 68 U.S. (1 Wall.) 340, 350-51, 17 L.Ed. 581 (1864). The patent owner’s rights with respect to the product end with its sale, United States v. Univis Lens Co., 316 U.S. 241, 252, 62 S.Ct. 1088, 1094, 86 L.Ed. 1408, 53 USPQ 404, 408 (1942), and a purchaser of such a product may use or resell the product free of the patent, id. at 250, 62 S.Ct. at 1093, 53 USPQ at 408. This longstanding principle applies similarly to a sale of a patented product manufactured by a licensee acting within the scope of its license. See Unidisco, Inc. v. Schattner, 824 F.2d 965, 968, 3 U.S.P.Q.2d 1439, 1441 (Fed.Cir.1987), cert. denied, 484 U.S. 1042, 108 S.Ct. 774, 98 L.Ed.2d 860 (1988).” (Emphasis added.)

Also see Intel Corp. v. U.S. Intern. Trade Com’n, 946 F.2d 821, 826 (Fed.Cir.1991):

“If the Intel/Sanyo agreement permits Sanyo to act as a foundry for another company for products covered by the Intel patents, the purchaser of those licensed products from Sanyo would be free to use and/or resell the products. Such further use and sale is beyond the reach of the patent statutes. See United States v. Univis Lens Co., 316 U.S. 241, 250-52 [62 S.Ct. 1088, 1093-94, 86 L.Ed. 1408] ... (1942) (the first vending of any article manufactured under a patent puts the article beyond the reach of the patent).” (Emphasis added.)

41. Any disposition of an allegedly patented article, so long as it is within the license grant, exhausts all patent rights in that article. A conventional sale of an article is not required for exhaustion to apply, because the form of a disposition does not govern. United States v. Masonite Corp., 316 U.S. 265, 277-78, 62 S.Ct. 1070, 1077-78, 86 L.Ed. 1461 (1942):

“There are strict limitations on the power of the patentee to attach conditions to the use of the patented article. As Chief Justice Taney said in Bloomer v. McQuewan, 14 How. 539, 549, when the patented product ‘passes to the hand of the purchaser, it is no longer within the limits of the monopoly. It passes outside of it, and is no longer under the protection of the act of Congress.’ In applying that rule, this Court has quite consistently refused to allow the form into which the parties chose to cast the transaction to govern. The test has been whether or not there has been such a disposition of the article that it may fairly be said that the patentee has received his reward for the use of the article. In determining whether or not a particular transaction comes within the rule of the Bloomer case, regard must be had for the dominant concern of the patent system. As stated by Mr. Justice Story in Pennock v. Dialogue, 2 Pet. 1, 19 [7 L.Ed. 327 (1829)], the promotion of the progress of science and the. useful arts is the ‘main object’; reward of inventors is secondary and merely a means to that end.” (Citations omitted.)

See also Harshberger v. Tarrson, 87 F.Supp. 43, 45-46 (N.D.Ill.1949), affirmed, 184 F.2d 628 (7th Cir.1950).

42. The patent exhaustion doctrine is so strong that it applies even to an incomplete product that has no substantial use other than to be further manufactured into a completed patented and allegedly infringing article. United States v. Univis Lens Co., 316 U.S. 241, 250-51, 62 S.Ct. 1088, 1093, 86 L.Ed. 1408 (1942):

“We think that ... where one has sold an uncompleted article which, because it embodies essential features of his patented invention, is within the protection of his patent, and has destined the article to be finished by the purchaser in conformity to the patent, he has sold his invention so far as it is or may be embodied in that particular article.”

43. Intel’s rights in .claims 2 and 6 are exhausted because Cyrix’s claim .1 microprocessors cannot be used for any purpose without external memory.

44. Cyrix’s microprocessors, although complete in and of themselves, are unfinished in the sense that they need to be combined with external memory to be used. Cyrix’s microprocessors thus are like the lens blanks in United States v. Univis Lens Co., 316 U.S. 241, 252, 62 S.Ct. 1088, 1094, 86 L.Ed. 1408 (1942) which, although completed lens blanks, had no use other than to be ground into finished lenses, in accordance with patents owned by the Lens Company. The Supreme Court’s rationale in Univis, in support of its holding that the patent owner’s rights in the lens blanks were exhausted, is thus fully applicable here with respect to Cyrix’s microprocessors:

“[I]t is plain that where the sale of the blank is by the patentee or his licensee— here the Lens Company — to a finisher, the only use to which it could be put and the only object of the sale is to enable the latter to grind and polish it for use as a lens by the prospective wearer. An incident to the purchase of any article, whether patented or unpatented, is the right.to use and sell it, and upon familiar principles the authorized sale of an article which is capable of use only in practicing the patent is a relinquishment of the patent monopoly with respect to the article sold. Leitch Mfg. Co. v. Barber Co., 302 U.S. 458, 460-61 [58 S.Ct. 288, 289-90, 82 L.Ed. 371 (1938)]; B.B. Chemical Co. v. Ellis, 314 U.S. 495 [62 S.Ct. 406, 86 L.Ed. 367 (1942)]. Sale of a lens blank by the patendee or by-his licensee is thus in itself both a complete transfer of ownership of the blank, which is within the protection of the patent law, and a license to practice the final stage of the patent procedure. In the present, case the entire consideration and compensation for both is the purchase price paid by the finishing licensee to the Lens Company.” (Emphasis added.)

(316 U.S. at 249-50, 62 S.Ct. at 1093)

45. The Supreme Court’s holding in Univis supports the conclusion here that claims' 2 and 6 of Intel’s ’338 Patent are exhausted when ST and TI make and sell to Cyrix microprocessors alleged by Intel to be covered by claim 1 of the patent. Under the holding of Univis, neither Cyrix nor its customers can infringe the ’338 Patent — either directly, or by actively inducing others to infringe, through the use or re-sale of microprocessors sold, to Cyrix by ST or TI.

46. Since the manufacture and sale of Cyrix’s microprocessors is licensed, Cyrix and its customers have the right to use those microprocessors for their intended purposes without infringement of the ’338 Patent. More particularly, because the intended use of Cyrix’s microprocessors is with external memory capable of storing page table entries and segment descriptors, neither Cyrix nor its customers can infringe claims 2 or 6 of the ’338 Patent either directly, or by actively inducing others to infringe. Elkay Mfg. Co. v. Ebco Mfg. Co., 1993 WL 69676 at *2 1993 U.S.Dist. LEXIS 3074 at *5-*7 (N.D.Iii. March 9, 1993):

“The marketing and sale of a patented product automatically conveys to the purchaser an automatic right to use the patented product for its intended normal purpose.” See Duplan Corp. v. Deering Milliken, Inc., 444 F.Supp. 648 (D.C.S.1977), aff d in part and rev’d in part, 594 F.2d 979 (4th Cir.1979), cert. denied, 444 U.S. 1015 [108 S.Ct. 666, 62 L.Ed.2d 645] (1980). This ‘use’ right is transferred to the customer even when the product embodies the feature of novelty recited in a patent claim.

Neither Cyrix Nor Its Customers Infringe The ’338 Patent

47. ST and TI are licensed to make, use and sell products embodying Intel’s intellectual property, including inventions covered by the ’338 Patent. Cyrix’s microprocessors are Licensed Products under the Intel-ST and Intel-TI license agreements. Cyrix, therefore, as the purchaser of licensed claim 1 microprocessors from ST and TI, is free to resell those products to its customers. Cyrix and its customers also are free to use the microprocessors for their intended purpose, including by combining them with external memory capable of holding page tables and segment descriptors. Such further use and sale is beyond the reach of the patent laws, and not an infringement of the ’338 Patent.

48. The combination of a microprocessor covered by claim 1 of the ’338 Patent and external memory infringes claims 2 and 6 of the ’338 Patent if the external memory is capable of “storing page table entries” (claim 2) and a “plurality of segment descriptors” (claim 6).

49. Cyrix’s microprocessors cannot be used for any commercially viable purpose without necessarily forming the combination covered by — and without necessarily infringing — claims 2 and 6 of the ’338 Patent.

50. The sale or other transfer by ST or TI to Cyrix of a claim 1 microprocessor exhausts Intel’s patent rights in the ’338 Patent, including without limitation in claims 1, 2 and 6. Intel thus may not, by virtue of the ’338 Patent, control the further use or disposition of such microprocessors. As a result, neither Cyrix nor any direct or indirect customer of Cyrix can infringe claims 1, 2 or 6 of the ’338 Patent — either directly or indirectly. Intel is barred by the doctrine of patent exhaustion from asserting claims 2 and 6 of the ’338 Patent against Cyrix or Cyrix’s customers.

IMPLIED LICENSE

51. Under the doctrine of legal estoppel “a grantor of a property right or interest cannot derogate from the right granted by his own subsequent acts.” AMP Inc. v. United States, 182 Ct.Cl. 86, 389 F.2d 448, 453, 156 USPQ 647, 650-51 (1968); Spindelfabrik Suessen-Schurr v. Schubert & Salzer, 829 F.2d 1075 (Fed.Cir.1987).

52. Since Cyrix’s claim 1 microprocessors cannot be used without infringing claims 2 and 6 of the ’338 Patent, there are no commercially viable non-infringing uses for the microprocessors. Intel’s rights in claims 1, 2 and 6 have been exhausted. Intel may not derogate from the rights granted TI and ST under the licensing agreements by requiring their customers who purchase licensed products to sell such products only to Intel licensees.

53. “Commercial viability” means the ability to sell a device at a profit and to afford the development and continuation of an ongoing business. “Profit” means the difference between what you sell a product for and what a product costs to make.

54. Cyrix acquired its claim 1 microprocessors from Intel’s licensees TI and ST, and in doing so acquired under the doctrine of legal estoppel an implied license to resell or otherwise dispose of them free and clear of a claim by Intel that such microprocessors infringe claims 2 and 6 of the ’338 Patent. Since the claims have been exhausted, the authorized sale of the claim 1 microprocessors by TI does not create a sublicense prohibited by the Intel-TI license agreement.

CONCLUSION

Cyrix is entitled to judgment in its favor on its affirmative defenses of patent exhaustion and implied license based on the use or resale of its claim 1 microprocessors purchased from TI and ST.

APPENDIX

CLAIMS 1, 2 AND 6 U.S. PATENT 4,972,338

1. A microprocessor device comprising:
(a) address register means for providing virtual memory addresses;
(b) a bus interface unit providing an interface to address terminals and data terminals of said device;
(e) an address translation unit receiving said virtual memory addresses from said address register means, the address translation unit including:
(i) a segmentation unit having at least one segment descriptor resistor storing a segment base address and a limit; a comparator in said segmentation unit comparing said virtual address to said limit and generating a fault if said limit is exceeded, said limit being of variable size; the segmentation unit adding said segment base address to said virtual address to produce a linear address having a page information field and an offset;
(ii) a page cache for storing a plurality of page entries and tags for said page entries, said page entries representing memory addresses for pages of fixed size; means for comparing tags to said page information field of said linear address to produce a match indication, the page cache producing a page entry output corresponding to one of said page entries if the match indication occurs;
(iii) page table addressing means responsive to said match indication and, if the match indication does not indicate a match, generating a page table address from a page base address and at least part of said page information field for transfer to said bus interface unit; the page table addressing means receiving a page table entry from said but [sic., bus] interface unit in response to said page table address, the page table entry corresponding to one of said page entries; and
(d) address generating means connected, in the alternative, to receive either (i) said linear address from said segmentation unit, or (ii) said offset part of said linear address combined with either said page entry output from said page cache
or said page table entry from said page table addressing means; said address generating means producing a physical address for applying to said bus interface unit.

2. A device according to claim 1 combined with a memory external to said device storing said page table entries and accessed by said physical address received from said terminals of said device.

6. A device according to claim 2 wherin [sic.] said memory also stores a plurality of segment descriptors for transfer to said segment descriptor register. 
      
       Claims 1, 2 and 6 are set forth in full in the attached Appendix A.
     
      
       As Dr. Ligler testified, "a person of ordinary skill in the art of designing microprocessors would have a relatively high level of skills. I would expect such an individual in the time frame of this invention to have a bachelor’s degree and several years of working experience, or a master's degree and perhaps fewer years of working experience.”
     
      
       Claim 1 includes numerous other instances of functional language that Intel has interpreted as language of capability. In each case, at the point in time that Intel has asserted Cyrix's microprocessors are covered by claim 1 — i.e., when made and sold — those microprocessors are not in fact performing the claimed function.
     